cs35l45.h 2.1 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677
  1. /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
  2. /*
  3. * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
  4. *
  5. * Copyright 2022 Cirrus Logic, Inc.
  6. */
  7. #ifndef DT_CS35L45_H
  8. #define DT_CS35L45_H
  9. /*
  10. * cirrus,asp-sdout-hiz-ctrl
  11. *
  12. * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
  13. * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
  14. */
  15. #define CS35L45_ASP_TX_HIZ_UNUSED 0x1
  16. #define CS35L45_ASP_TX_HIZ_DISABLED 0x2
  17. /*
  18. * Optional GPIOX Sub-nodes:
  19. * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
  20. * sub-nodes for configuring the GPIO pins.
  21. *
  22. * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
  23. * is 1.
  24. * 0 = Output
  25. * 1 = Input (Default)
  26. *
  27. * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
  28. *
  29. * 0 = Low (Default)
  30. * 1 = High
  31. *
  32. * - gpio-op-cfg : GPIO output configuration. Valid only when 'gpio-ctrl' is 1
  33. * and 'gpio-dir' is 0.
  34. *
  35. * 0 = CMOS (Default)
  36. * 1 = Open Drain
  37. *
  38. * - gpio-pol : GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
  39. * and 'gpio-dir' is 0.
  40. *
  41. * 0 = Non-inverted, Active High (Default)
  42. * 1 = Inverted, Active Low
  43. *
  44. * - gpio-invert : Defines the polarity of the GPIO pin if configured
  45. * as input.
  46. *
  47. * 0 = Not inverted (Default)
  48. * 1 = Inverted
  49. *
  50. * - gpio-ctrl : Defines the function of the GPIO pin.
  51. *
  52. * GPIO1:
  53. * 0 = High impedance input (Default)
  54. * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
  55. * 2 = Pin acts as MDSYNC, direction controlled by MDSYNC
  56. * 3-7 = Reserved
  57. *
  58. * GPIO2:
  59. * 0 = High impedance input (Default)
  60. * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
  61. * 2 = Pin acts as open drain INT
  62. * 3 = Reserved
  63. * 4 = Pin acts as push-pull output INT. Active low.
  64. * 5 = Pin acts as push-pull output INT. Active high.
  65. * 6,7 = Reserved
  66. *
  67. * GPIO3:
  68. * 0 = High impedance input (Default)
  69. * 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
  70. * 2-7 = Reserved
  71. */
  72. #define CS35L45_NUM_GPIOS 0x3
  73. #endif /* DT_CS35L45_H */