ufs.h 18 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Universal Flash Storage Host controller driver
  4. * Copyright (C) 2011-2013 Samsung India Software Operations
  5. *
  6. * Authors:
  7. * Santosh Yaraganavi <santosh.sy@samsung.com>
  8. * Vinayak Holikatti <h.vinayak@samsung.com>
  9. */
  10. #ifndef _UFS_H
  11. #define _UFS_H
  12. #include <linux/bitops.h>
  13. #include <linux/types.h>
  14. #include <uapi/scsi/scsi_bsg_ufs.h>
  15. #include <linux/time64.h>
  16. /*
  17. * Using static_assert() is not allowed in UAPI header files. Hence the check
  18. * in this header file of the size of struct utp_upiu_header.
  19. */
  20. static_assert(sizeof(struct utp_upiu_header) == 12);
  21. #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
  22. #define QUERY_DESC_MAX_SIZE 255
  23. #define QUERY_DESC_MIN_SIZE 2
  24. #define QUERY_DESC_HDR_SIZE 2
  25. #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \
  26. (sizeof(struct utp_upiu_header)))
  27. #define UFS_SENSE_SIZE 18
  28. /*
  29. * UFS device may have standard LUs and LUN id could be from 0x00 to
  30. * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
  31. * UFS device may also have the Well Known LUs (also referred as W-LU)
  32. * which again could be from 0x00 to 0x7F. For W-LUs, device only use
  33. * the "Extended Addressing Format" which means the W-LUNs would be
  34. * from 0xc100 (SCSI_W_LUN_BASE) onwards.
  35. * This means max. LUN number reported from UFS device could be 0xC17F.
  36. */
  37. #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F
  38. #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
  39. #define UFS_UPIU_WLUN_ID (1 << 7)
  40. /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
  41. #define UFS_UPIU_MAX_WB_LUN_ID 8
  42. /*
  43. * WriteBooster buffer lifetime has a limit setted by vendor.
  44. * If it is over the limit, WriteBooster feature will be disabled.
  45. */
  46. #define UFS_WB_EXCEED_LIFETIME 0x0B
  47. /*
  48. * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet
  49. */
  50. #define EHS_OFFSET_IN_RESPONSE 32
  51. /* Well known logical unit id in LUN field of UPIU */
  52. enum {
  53. UFS_UPIU_REPORT_LUNS_WLUN = 0x81,
  54. UFS_UPIU_UFS_DEVICE_WLUN = 0xD0,
  55. UFS_UPIU_BOOT_WLUN = 0xB0,
  56. UFS_UPIU_RPMB_WLUN = 0xC4,
  57. };
  58. /*
  59. * UFS Protocol Information Unit related definitions
  60. */
  61. /* Task management functions */
  62. enum {
  63. UFS_ABORT_TASK = 0x01,
  64. UFS_ABORT_TASK_SET = 0x02,
  65. UFS_CLEAR_TASK_SET = 0x04,
  66. UFS_LOGICAL_RESET = 0x08,
  67. UFS_QUERY_TASK = 0x80,
  68. UFS_QUERY_TASK_SET = 0x81,
  69. };
  70. /* UTP UPIU Transaction Codes Initiator to Target */
  71. enum upiu_request_transaction {
  72. UPIU_TRANSACTION_NOP_OUT = 0x00,
  73. UPIU_TRANSACTION_COMMAND = 0x01,
  74. UPIU_TRANSACTION_DATA_OUT = 0x02,
  75. UPIU_TRANSACTION_TASK_REQ = 0x04,
  76. UPIU_TRANSACTION_QUERY_REQ = 0x16,
  77. };
  78. /* UTP UPIU Transaction Codes Target to Initiator */
  79. enum upiu_response_transaction {
  80. UPIU_TRANSACTION_NOP_IN = 0x20,
  81. UPIU_TRANSACTION_RESPONSE = 0x21,
  82. UPIU_TRANSACTION_DATA_IN = 0x22,
  83. UPIU_TRANSACTION_TASK_RSP = 0x24,
  84. UPIU_TRANSACTION_READY_XFER = 0x31,
  85. UPIU_TRANSACTION_QUERY_RSP = 0x36,
  86. UPIU_TRANSACTION_REJECT_UPIU = 0x3F,
  87. };
  88. /* UPIU Read/Write flags. See also table "UPIU Flags" in the UFS standard. */
  89. enum {
  90. UPIU_CMD_FLAGS_NONE = 0x00,
  91. UPIU_CMD_FLAGS_CP = 0x04,
  92. UPIU_CMD_FLAGS_WRITE = 0x20,
  93. UPIU_CMD_FLAGS_READ = 0x40,
  94. };
  95. /* UPIU response flags */
  96. enum {
  97. UPIU_RSP_FLAG_UNDERFLOW = 0x20,
  98. UPIU_RSP_FLAG_OVERFLOW = 0x40,
  99. };
  100. /* UPIU Task Attributes */
  101. enum {
  102. UPIU_TASK_ATTR_SIMPLE = 0x00,
  103. UPIU_TASK_ATTR_ORDERED = 0x01,
  104. UPIU_TASK_ATTR_HEADQ = 0x02,
  105. UPIU_TASK_ATTR_ACA = 0x03,
  106. };
  107. /* UPIU Query request function */
  108. enum {
  109. UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01,
  110. UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81,
  111. };
  112. /* Flag idn for Query Requests*/
  113. enum flag_idn {
  114. QUERY_FLAG_IDN_FDEVICEINIT = 0x01,
  115. QUERY_FLAG_IDN_PERMANENT_WPE = 0x02,
  116. QUERY_FLAG_IDN_PWR_ON_WPE = 0x03,
  117. QUERY_FLAG_IDN_BKOPS_EN = 0x04,
  118. QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE = 0x05,
  119. QUERY_FLAG_IDN_PURGE_ENABLE = 0x06,
  120. QUERY_FLAG_IDN_RESERVED2 = 0x07,
  121. QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL = 0x08,
  122. QUERY_FLAG_IDN_BUSY_RTC = 0x09,
  123. QUERY_FLAG_IDN_RESERVED3 = 0x0A,
  124. QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B,
  125. QUERY_FLAG_IDN_WB_EN = 0x0E,
  126. QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F,
  127. QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10,
  128. QUERY_FLAG_IDN_HPB_RESET = 0x11,
  129. QUERY_FLAG_IDN_HPB_EN = 0x12,
  130. };
  131. /* Attribute idn for Query requests */
  132. enum attr_idn {
  133. QUERY_ATTR_IDN_BOOT_LU_EN = 0x00,
  134. QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD = 0x01,
  135. QUERY_ATTR_IDN_POWER_MODE = 0x02,
  136. QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03,
  137. QUERY_ATTR_IDN_OOO_DATA_EN = 0x04,
  138. QUERY_ATTR_IDN_BKOPS_STATUS = 0x05,
  139. QUERY_ATTR_IDN_PURGE_STATUS = 0x06,
  140. QUERY_ATTR_IDN_MAX_DATA_IN = 0x07,
  141. QUERY_ATTR_IDN_MAX_DATA_OUT = 0x08,
  142. QUERY_ATTR_IDN_DYN_CAP_NEEDED = 0x09,
  143. QUERY_ATTR_IDN_REF_CLK_FREQ = 0x0A,
  144. QUERY_ATTR_IDN_CONF_DESC_LOCK = 0x0B,
  145. QUERY_ATTR_IDN_MAX_NUM_OF_RTT = 0x0C,
  146. QUERY_ATTR_IDN_EE_CONTROL = 0x0D,
  147. QUERY_ATTR_IDN_EE_STATUS = 0x0E,
  148. QUERY_ATTR_IDN_SECONDS_PASSED = 0x0F,
  149. QUERY_ATTR_IDN_CNTX_CONF = 0x10,
  150. QUERY_ATTR_IDN_CORR_PRG_BLK_NUM = 0x11,
  151. QUERY_ATTR_IDN_RESERVED2 = 0x12,
  152. QUERY_ATTR_IDN_RESERVED3 = 0x13,
  153. QUERY_ATTR_IDN_FFU_STATUS = 0x14,
  154. QUERY_ATTR_IDN_PSA_STATE = 0x15,
  155. QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
  156. QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
  157. QUERY_ATTR_IDN_CASE_ROUGH_TEMP = 0x18,
  158. QUERY_ATTR_IDN_HIGH_TEMP_BOUND = 0x19,
  159. QUERY_ATTR_IDN_LOW_TEMP_BOUND = 0x1A,
  160. QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C,
  161. QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
  162. QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
  163. QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
  164. QUERY_ATTR_IDN_EXT_IID_EN = 0x2A,
  165. QUERY_ATTR_IDN_TIMESTAMP = 0x30
  166. };
  167. /* Descriptor idn for Query requests */
  168. enum desc_idn {
  169. QUERY_DESC_IDN_DEVICE = 0x0,
  170. QUERY_DESC_IDN_CONFIGURATION = 0x1,
  171. QUERY_DESC_IDN_UNIT = 0x2,
  172. QUERY_DESC_IDN_RFU_0 = 0x3,
  173. QUERY_DESC_IDN_INTERCONNECT = 0x4,
  174. QUERY_DESC_IDN_STRING = 0x5,
  175. QUERY_DESC_IDN_RFU_1 = 0x6,
  176. QUERY_DESC_IDN_GEOMETRY = 0x7,
  177. QUERY_DESC_IDN_POWER = 0x8,
  178. QUERY_DESC_IDN_HEALTH = 0x9,
  179. QUERY_DESC_IDN_MAX,
  180. };
  181. enum desc_header_offset {
  182. QUERY_DESC_LENGTH_OFFSET = 0x00,
  183. QUERY_DESC_DESC_TYPE_OFFSET = 0x01,
  184. };
  185. /* Unit descriptor parameters offsets in bytes*/
  186. enum unit_desc_param {
  187. UNIT_DESC_PARAM_LEN = 0x0,
  188. UNIT_DESC_PARAM_TYPE = 0x1,
  189. UNIT_DESC_PARAM_UNIT_INDEX = 0x2,
  190. UNIT_DESC_PARAM_LU_ENABLE = 0x3,
  191. UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4,
  192. UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5,
  193. UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6,
  194. UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7,
  195. UNIT_DESC_PARAM_MEM_TYPE = 0x8,
  196. UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9,
  197. UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA,
  198. UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB,
  199. UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13,
  200. UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17,
  201. UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18,
  202. UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20,
  203. UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22,
  204. UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS = 0x23,
  205. UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF = 0x25,
  206. UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS = 0x27,
  207. UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29,
  208. };
  209. /* RPMB Unit descriptor parameters offsets in bytes*/
  210. enum rpmb_unit_desc_param {
  211. RPMB_UNIT_DESC_PARAM_LEN = 0x0,
  212. RPMB_UNIT_DESC_PARAM_TYPE = 0x1,
  213. RPMB_UNIT_DESC_PARAM_UNIT_INDEX = 0x2,
  214. RPMB_UNIT_DESC_PARAM_LU_ENABLE = 0x3,
  215. RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4,
  216. RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5,
  217. RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6,
  218. RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7,
  219. RPMB_UNIT_DESC_PARAM_MEM_TYPE = 0x8,
  220. RPMB_UNIT_DESC_PARAM_REGION_EN = 0x9,
  221. RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA,
  222. RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB,
  223. RPMB_UNIT_DESC_PARAM_REGION0_SIZE = 0x13,
  224. RPMB_UNIT_DESC_PARAM_REGION1_SIZE = 0x14,
  225. RPMB_UNIT_DESC_PARAM_REGION2_SIZE = 0x15,
  226. RPMB_UNIT_DESC_PARAM_REGION3_SIZE = 0x16,
  227. RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17,
  228. RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18,
  229. };
  230. /* Device descriptor parameters offsets in bytes*/
  231. enum device_desc_param {
  232. DEVICE_DESC_PARAM_LEN = 0x0,
  233. DEVICE_DESC_PARAM_TYPE = 0x1,
  234. DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2,
  235. DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3,
  236. DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4,
  237. DEVICE_DESC_PARAM_PRTCL = 0x5,
  238. DEVICE_DESC_PARAM_NUM_LU = 0x6,
  239. DEVICE_DESC_PARAM_NUM_WLU = 0x7,
  240. DEVICE_DESC_PARAM_BOOT_ENBL = 0x8,
  241. DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9,
  242. DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA,
  243. DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB,
  244. DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC,
  245. DEVICE_DESC_PARAM_SEC_LU = 0xD,
  246. DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE,
  247. DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF,
  248. DEVICE_DESC_PARAM_SPEC_VER = 0x10,
  249. DEVICE_DESC_PARAM_MANF_DATE = 0x12,
  250. DEVICE_DESC_PARAM_MANF_NAME = 0x14,
  251. DEVICE_DESC_PARAM_PRDCT_NAME = 0x15,
  252. DEVICE_DESC_PARAM_SN = 0x16,
  253. DEVICE_DESC_PARAM_OEM_ID = 0x17,
  254. DEVICE_DESC_PARAM_MANF_ID = 0x18,
  255. DEVICE_DESC_PARAM_UD_OFFSET = 0x1A,
  256. DEVICE_DESC_PARAM_UD_LEN = 0x1B,
  257. DEVICE_DESC_PARAM_RTT_CAP = 0x1C,
  258. DEVICE_DESC_PARAM_FRQ_RTC = 0x1D,
  259. DEVICE_DESC_PARAM_UFS_FEAT = 0x1F,
  260. DEVICE_DESC_PARAM_FFU_TMT = 0x20,
  261. DEVICE_DESC_PARAM_Q_DPTH = 0x21,
  262. DEVICE_DESC_PARAM_DEV_VER = 0x22,
  263. DEVICE_DESC_PARAM_NUM_SEC_WPA = 0x24,
  264. DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25,
  265. DEVICE_DESC_PARAM_PSA_TMT = 0x29,
  266. DEVICE_DESC_PARAM_PRDCT_REV = 0x2A,
  267. DEVICE_DESC_PARAM_HPB_VER = 0x40,
  268. DEVICE_DESC_PARAM_HPB_CONTROL = 0x42,
  269. DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F,
  270. DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53,
  271. DEVICE_DESC_PARAM_WB_TYPE = 0x54,
  272. DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
  273. };
  274. /* Interconnect descriptor parameters offsets in bytes*/
  275. enum interconnect_desc_param {
  276. INTERCONNECT_DESC_PARAM_LEN = 0x0,
  277. INTERCONNECT_DESC_PARAM_TYPE = 0x1,
  278. INTERCONNECT_DESC_PARAM_UNIPRO_VER = 0x2,
  279. INTERCONNECT_DESC_PARAM_MPHY_VER = 0x4,
  280. };
  281. /* Geometry descriptor parameters offsets in bytes*/
  282. enum geometry_desc_param {
  283. GEOMETRY_DESC_PARAM_LEN = 0x0,
  284. GEOMETRY_DESC_PARAM_TYPE = 0x1,
  285. GEOMETRY_DESC_PARAM_DEV_CAP = 0x4,
  286. GEOMETRY_DESC_PARAM_MAX_NUM_LUN = 0xC,
  287. GEOMETRY_DESC_PARAM_SEG_SIZE = 0xD,
  288. GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE = 0x11,
  289. GEOMETRY_DESC_PARAM_MIN_BLK_SIZE = 0x12,
  290. GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE = 0x13,
  291. GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE = 0x14,
  292. GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE = 0x15,
  293. GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE = 0x16,
  294. GEOMETRY_DESC_PARAM_RPMB_RW_SIZE = 0x17,
  295. GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC = 0x18,
  296. GEOMETRY_DESC_PARAM_DATA_ORDER = 0x19,
  297. GEOMETRY_DESC_PARAM_MAX_NUM_CTX = 0x1A,
  298. GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE = 0x1B,
  299. GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE = 0x1C,
  300. GEOMETRY_DESC_PARAM_SEC_RM_TYPES = 0x1D,
  301. GEOMETRY_DESC_PARAM_MEM_TYPES = 0x1E,
  302. GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS = 0x20,
  303. GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR = 0x24,
  304. GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS = 0x26,
  305. GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR = 0x2A,
  306. GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS = 0x2C,
  307. GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR = 0x30,
  308. GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS = 0x32,
  309. GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR = 0x36,
  310. GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS = 0x38,
  311. GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR = 0x3C,
  312. GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS = 0x3E,
  313. GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR = 0x42,
  314. GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE = 0x44,
  315. GEOMETRY_DESC_PARAM_HPB_REGION_SIZE = 0x48,
  316. GEOMETRY_DESC_PARAM_HPB_NUMBER_LU = 0x49,
  317. GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE = 0x4A,
  318. GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
  319. GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS = 0x4F,
  320. GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS = 0x53,
  321. GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ = 0x54,
  322. GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE = 0x55,
  323. GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE = 0x56,
  324. };
  325. /* Health descriptor parameters offsets in bytes*/
  326. enum health_desc_param {
  327. HEALTH_DESC_PARAM_LEN = 0x0,
  328. HEALTH_DESC_PARAM_TYPE = 0x1,
  329. HEALTH_DESC_PARAM_EOL_INFO = 0x2,
  330. HEALTH_DESC_PARAM_LIFE_TIME_EST_A = 0x3,
  331. HEALTH_DESC_PARAM_LIFE_TIME_EST_B = 0x4,
  332. };
  333. /* WriteBooster buffer mode */
  334. enum {
  335. WB_BUF_MODE_LU_DEDICATED = 0x0,
  336. WB_BUF_MODE_SHARED = 0x1,
  337. };
  338. /*
  339. * Logical Unit Write Protect
  340. * 00h: LU not write protected
  341. * 01h: LU write protected when fPowerOnWPEn =1
  342. * 02h: LU permanently write protected when fPermanentWPEn =1
  343. */
  344. enum ufs_lu_wp_type {
  345. UFS_LU_NO_WP = 0x00,
  346. UFS_LU_POWER_ON_WP = 0x01,
  347. UFS_LU_PERM_WP = 0x02,
  348. };
  349. /* bActiveICCLevel parameter current units */
  350. enum {
  351. UFSHCD_NANO_AMP = 0,
  352. UFSHCD_MICRO_AMP = 1,
  353. UFSHCD_MILI_AMP = 2,
  354. UFSHCD_AMP = 3,
  355. };
  356. /* Possible values for dExtendedUFSFeaturesSupport */
  357. enum {
  358. UFS_DEV_HIGH_TEMP_NOTIF = BIT(4),
  359. UFS_DEV_LOW_TEMP_NOTIF = BIT(5),
  360. UFS_DEV_EXT_TEMP_NOTIF = BIT(6),
  361. UFS_DEV_HPB_SUPPORT = BIT(7),
  362. UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
  363. UFS_DEV_EXT_IID_SUP = BIT(16),
  364. };
  365. #define UFS_DEV_HPB_SUPPORT_VERSION 0x310
  366. #define POWER_DESC_MAX_ACTV_ICC_LVLS 16
  367. /* Attribute bActiveICCLevel parameter bit masks definitions */
  368. #define ATTR_ICC_LVL_UNIT_OFFSET 14
  369. #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
  370. #define ATTR_ICC_LVL_VALUE_MASK 0x3FF
  371. /* Power descriptor parameters offsets in bytes */
  372. enum power_desc_param_offset {
  373. PWR_DESC_LEN = 0x0,
  374. PWR_DESC_TYPE = 0x1,
  375. PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2,
  376. PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22,
  377. PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42,
  378. };
  379. /* Exception event mask values */
  380. enum {
  381. MASK_EE_STATUS = 0xFFFF,
  382. MASK_EE_DYNCAP_EVENT = BIT(0),
  383. MASK_EE_SYSPOOL_EVENT = BIT(1),
  384. MASK_EE_URGENT_BKOPS = BIT(2),
  385. MASK_EE_TOO_HIGH_TEMP = BIT(3),
  386. MASK_EE_TOO_LOW_TEMP = BIT(4),
  387. MASK_EE_WRITEBOOSTER_EVENT = BIT(5),
  388. MASK_EE_PERFORMANCE_THROTTLING = BIT(6),
  389. };
  390. #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
  391. /* Background operation status */
  392. enum bkops_status {
  393. BKOPS_STATUS_NO_OP = 0x0,
  394. BKOPS_STATUS_NON_CRITICAL = 0x1,
  395. BKOPS_STATUS_PERF_IMPACT = 0x2,
  396. BKOPS_STATUS_CRITICAL = 0x3,
  397. BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL,
  398. };
  399. /* UTP QUERY Transaction Specific Fields OpCode */
  400. enum query_opcode {
  401. UPIU_QUERY_OPCODE_NOP = 0x0,
  402. UPIU_QUERY_OPCODE_READ_DESC = 0x1,
  403. UPIU_QUERY_OPCODE_WRITE_DESC = 0x2,
  404. UPIU_QUERY_OPCODE_READ_ATTR = 0x3,
  405. UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4,
  406. UPIU_QUERY_OPCODE_READ_FLAG = 0x5,
  407. UPIU_QUERY_OPCODE_SET_FLAG = 0x6,
  408. UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7,
  409. UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8,
  410. };
  411. /* bRefClkFreq attribute values */
  412. enum ufs_ref_clk_freq {
  413. REF_CLK_FREQ_19_2_MHZ = 0,
  414. REF_CLK_FREQ_26_MHZ = 1,
  415. REF_CLK_FREQ_38_4_MHZ = 2,
  416. REF_CLK_FREQ_52_MHZ = 3,
  417. REF_CLK_FREQ_INVAL = -1,
  418. };
  419. /* Query response result code */
  420. enum {
  421. QUERY_RESULT_SUCCESS = 0x00,
  422. QUERY_RESULT_NOT_READABLE = 0xF6,
  423. QUERY_RESULT_NOT_WRITEABLE = 0xF7,
  424. QUERY_RESULT_ALREADY_WRITTEN = 0xF8,
  425. QUERY_RESULT_INVALID_LENGTH = 0xF9,
  426. QUERY_RESULT_INVALID_VALUE = 0xFA,
  427. QUERY_RESULT_INVALID_SELECTOR = 0xFB,
  428. QUERY_RESULT_INVALID_INDEX = 0xFC,
  429. QUERY_RESULT_INVALID_IDN = 0xFD,
  430. QUERY_RESULT_INVALID_OPCODE = 0xFE,
  431. QUERY_RESULT_GENERAL_FAILURE = 0xFF,
  432. };
  433. /* UTP Transfer Request Command Type (CT) */
  434. enum {
  435. UPIU_COMMAND_SET_TYPE_SCSI = 0x0,
  436. UPIU_COMMAND_SET_TYPE_UFS = 0x1,
  437. UPIU_COMMAND_SET_TYPE_QUERY = 0x2,
  438. };
  439. /* Offset of the response code in the UPIU header */
  440. #define UPIU_RSP_CODE_OFFSET 8
  441. enum {
  442. MASK_TM_SERVICE_RESP = 0xFF,
  443. };
  444. /* Task management service response */
  445. enum {
  446. UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00,
  447. UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
  448. UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08,
  449. UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05,
  450. UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09,
  451. };
  452. /* UFS device power modes */
  453. enum ufs_dev_pwr_mode {
  454. UFS_ACTIVE_PWR_MODE = 1,
  455. UFS_SLEEP_PWR_MODE = 2,
  456. UFS_POWERDOWN_PWR_MODE = 3,
  457. UFS_DEEPSLEEP_PWR_MODE = 4,
  458. };
  459. #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
  460. /**
  461. * struct utp_cmd_rsp - Response UPIU structure
  462. * @residual_transfer_count: Residual transfer count DW-3
  463. * @reserved: Reserved double words DW-4 to DW-7
  464. * @sense_data_len: Sense data length DW-8 U16
  465. * @sense_data: Sense data field DW-8 to DW-12
  466. */
  467. struct utp_cmd_rsp {
  468. __be32 residual_transfer_count;
  469. __be32 reserved[4];
  470. __be16 sense_data_len;
  471. u8 sense_data[UFS_SENSE_SIZE];
  472. };
  473. /**
  474. * struct utp_upiu_rsp - general upiu response structure
  475. * @header: UPIU header structure DW-0 to DW-2
  476. * @sr: fields structure for scsi command DW-3 to DW-12
  477. * @qr: fields structure for query request DW-3 to DW-7
  478. */
  479. struct utp_upiu_rsp {
  480. struct utp_upiu_header header;
  481. union {
  482. struct utp_cmd_rsp sr;
  483. struct utp_upiu_query qr;
  484. };
  485. };
  486. /*
  487. * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
  488. * and link is in Hibern8 state.
  489. */
  490. #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */
  491. struct ufs_vreg {
  492. struct regulator *reg;
  493. const char *name;
  494. bool always_on;
  495. bool enabled;
  496. int max_uA;
  497. };
  498. struct ufs_vreg_info {
  499. struct ufs_vreg *vcc;
  500. struct ufs_vreg *vccq;
  501. struct ufs_vreg *vccq2;
  502. struct ufs_vreg *vdd_hba;
  503. };
  504. /* UFS device descriptor wPeriodicRTCUpdate bit9 defines RTC time baseline */
  505. #define UFS_RTC_TIME_BASELINE BIT(9)
  506. enum ufs_rtc_time {
  507. UFS_RTC_RELATIVE,
  508. UFS_RTC_ABSOLUTE
  509. };
  510. struct ufs_dev_info {
  511. bool f_power_on_wp_en;
  512. /* Keeps information if any of the LU is power on write protected */
  513. bool is_lu_power_on_wp;
  514. /* Maximum number of general LU supported by the UFS device */
  515. u8 max_lu_supported;
  516. u16 wmanufacturerid;
  517. /*UFS device Product Name */
  518. u8 *model;
  519. u16 wspecversion;
  520. u32 clk_gating_wait_us;
  521. /* Stores the depth of queue in UFS device */
  522. u8 bqueuedepth;
  523. /* UFS WB related flags */
  524. bool wb_enabled;
  525. bool wb_buf_flush_enabled;
  526. u8 wb_dedicated_lu;
  527. u8 wb_buffer_type;
  528. bool b_rpm_dev_flush_capable;
  529. u8 b_presrv_uspc_en;
  530. bool b_advanced_rpmb_en;
  531. /* UFS EXT_IID Enable */
  532. bool b_ext_iid_en;
  533. /* UFS RTC */
  534. enum ufs_rtc_time rtc_type;
  535. time64_t rtc_time_baseline;
  536. u32 rtc_update_period;
  537. u8 rtt_cap; /* bDeviceRTTCap */
  538. };
  539. /*
  540. * This enum is used in string mapping in ufs_trace.h.
  541. */
  542. enum ufs_trace_str_t {
  543. UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
  544. UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
  545. UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
  546. };
  547. /*
  548. * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
  549. * used in ufs_trace.h for UFS command trace.
  550. */
  551. enum ufs_trace_tsf_t {
  552. UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
  553. };
  554. #endif /* End of Header */