mbochs.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Mediated virtual PCI display host device driver
  4. *
  5. * Emulate enough of qemu stdvga to make bochs-drm.ko happy. That is
  6. * basically the vram memory bar and the bochs dispi interface vbe
  7. * registers in the mmio register bar. Specifically it does *not*
  8. * include any legacy vga stuff. Device looks a lot like "qemu -device
  9. * secondary-vga".
  10. *
  11. * (c) Gerd Hoffmann <kraxel@redhat.com>
  12. *
  13. * based on mtty driver which is:
  14. * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
  15. * Author: Neo Jia <cjia@nvidia.com>
  16. * Kirti Wankhede <kwankhede@nvidia.com>
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/kernel.h>
  25. #include <linux/slab.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/cdev.h>
  28. #include <linux/vfio.h>
  29. #include <linux/iommu.h>
  30. #include <linux/sysfs.h>
  31. #include <linux/mdev.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-buf.h>
  34. #include <linux/highmem.h>
  35. #include <drm/drm_fourcc.h>
  36. #include <drm/drm_rect.h>
  37. #include <drm/drm_modeset_lock.h>
  38. #include <drm/drm_property.h>
  39. #include <drm/drm_plane.h>
  40. #define VBE_DISPI_INDEX_ID 0x0
  41. #define VBE_DISPI_INDEX_XRES 0x1
  42. #define VBE_DISPI_INDEX_YRES 0x2
  43. #define VBE_DISPI_INDEX_BPP 0x3
  44. #define VBE_DISPI_INDEX_ENABLE 0x4
  45. #define VBE_DISPI_INDEX_BANK 0x5
  46. #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
  47. #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
  48. #define VBE_DISPI_INDEX_X_OFFSET 0x8
  49. #define VBE_DISPI_INDEX_Y_OFFSET 0x9
  50. #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
  51. #define VBE_DISPI_INDEX_COUNT 0xb
  52. #define VBE_DISPI_ID0 0xB0C0
  53. #define VBE_DISPI_ID1 0xB0C1
  54. #define VBE_DISPI_ID2 0xB0C2
  55. #define VBE_DISPI_ID3 0xB0C3
  56. #define VBE_DISPI_ID4 0xB0C4
  57. #define VBE_DISPI_ID5 0xB0C5
  58. #define VBE_DISPI_DISABLED 0x00
  59. #define VBE_DISPI_ENABLED 0x01
  60. #define VBE_DISPI_GETCAPS 0x02
  61. #define VBE_DISPI_8BIT_DAC 0x20
  62. #define VBE_DISPI_LFB_ENABLED 0x40
  63. #define VBE_DISPI_NOCLEARMEM 0x80
  64. #define MBOCHS_NAME "mbochs"
  65. #define MBOCHS_CLASS_NAME "mbochs"
  66. #define MBOCHS_EDID_REGION_INDEX VFIO_PCI_NUM_REGIONS
  67. #define MBOCHS_NUM_REGIONS (MBOCHS_EDID_REGION_INDEX+1)
  68. #define MBOCHS_CONFIG_SPACE_SIZE 0xff
  69. #define MBOCHS_MMIO_BAR_OFFSET PAGE_SIZE
  70. #define MBOCHS_MMIO_BAR_SIZE PAGE_SIZE
  71. #define MBOCHS_EDID_OFFSET (MBOCHS_MMIO_BAR_OFFSET + \
  72. MBOCHS_MMIO_BAR_SIZE)
  73. #define MBOCHS_EDID_SIZE PAGE_SIZE
  74. #define MBOCHS_MEMORY_BAR_OFFSET (MBOCHS_EDID_OFFSET + \
  75. MBOCHS_EDID_SIZE)
  76. #define MBOCHS_EDID_BLOB_OFFSET (MBOCHS_EDID_SIZE/2)
  77. #define STORE_LE16(addr, val) (*(u16 *)addr = val)
  78. #define STORE_LE32(addr, val) (*(u32 *)addr = val)
  79. MODULE_DESCRIPTION("Mediated virtual PCI display host device driver");
  80. MODULE_LICENSE("GPL v2");
  81. static int max_mbytes = 256;
  82. module_param_named(count, max_mbytes, int, 0444);
  83. MODULE_PARM_DESC(mem, "megabytes available to " MBOCHS_NAME " devices");
  84. #define MBOCHS_TYPE_1 "small"
  85. #define MBOCHS_TYPE_2 "medium"
  86. #define MBOCHS_TYPE_3 "large"
  87. static struct mbochs_type {
  88. struct mdev_type type;
  89. u32 mbytes;
  90. u32 max_x;
  91. u32 max_y;
  92. } mbochs_types[] = {
  93. {
  94. .type.sysfs_name = MBOCHS_TYPE_1,
  95. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_1,
  96. .mbytes = 4,
  97. .max_x = 800,
  98. .max_y = 600,
  99. }, {
  100. .type.sysfs_name = MBOCHS_TYPE_2,
  101. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_2,
  102. .mbytes = 16,
  103. .max_x = 1920,
  104. .max_y = 1440,
  105. }, {
  106. .type.sysfs_name = MBOCHS_TYPE_3,
  107. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_3,
  108. .mbytes = 64,
  109. .max_x = 0,
  110. .max_y = 0,
  111. },
  112. };
  113. static struct mdev_type *mbochs_mdev_types[] = {
  114. &mbochs_types[0].type,
  115. &mbochs_types[1].type,
  116. &mbochs_types[2].type,
  117. };
  118. static dev_t mbochs_devt;
  119. static const struct class mbochs_class = {
  120. .name = MBOCHS_CLASS_NAME,
  121. };
  122. static struct cdev mbochs_cdev;
  123. static struct device mbochs_dev;
  124. static struct mdev_parent mbochs_parent;
  125. static atomic_t mbochs_avail_mbytes;
  126. static const struct vfio_device_ops mbochs_dev_ops;
  127. struct vfio_region_info_ext {
  128. struct vfio_region_info base;
  129. struct vfio_region_info_cap_type type;
  130. };
  131. struct mbochs_mode {
  132. u32 drm_format;
  133. u32 bytepp;
  134. u32 width;
  135. u32 height;
  136. u32 stride;
  137. u32 __pad;
  138. u64 offset;
  139. u64 size;
  140. };
  141. struct mbochs_dmabuf {
  142. struct mbochs_mode mode;
  143. u32 id;
  144. struct page **pages;
  145. pgoff_t pagecount;
  146. struct dma_buf *buf;
  147. struct mdev_state *mdev_state;
  148. struct list_head next;
  149. bool unlinked;
  150. };
  151. /* State of each mdev device */
  152. struct mdev_state {
  153. struct vfio_device vdev;
  154. u8 *vconfig;
  155. u64 bar_mask[3];
  156. u32 memory_bar_mask;
  157. struct mutex ops_lock;
  158. struct mdev_device *mdev;
  159. const struct mbochs_type *type;
  160. u16 vbe[VBE_DISPI_INDEX_COUNT];
  161. u64 memsize;
  162. struct page **pages;
  163. pgoff_t pagecount;
  164. struct vfio_region_gfx_edid edid_regs;
  165. u8 edid_blob[0x400];
  166. struct list_head dmabufs;
  167. u32 active_id;
  168. u32 next_id;
  169. };
  170. static const char *vbe_name_list[VBE_DISPI_INDEX_COUNT] = {
  171. [VBE_DISPI_INDEX_ID] = "id",
  172. [VBE_DISPI_INDEX_XRES] = "xres",
  173. [VBE_DISPI_INDEX_YRES] = "yres",
  174. [VBE_DISPI_INDEX_BPP] = "bpp",
  175. [VBE_DISPI_INDEX_ENABLE] = "enable",
  176. [VBE_DISPI_INDEX_BANK] = "bank",
  177. [VBE_DISPI_INDEX_VIRT_WIDTH] = "virt-width",
  178. [VBE_DISPI_INDEX_VIRT_HEIGHT] = "virt-height",
  179. [VBE_DISPI_INDEX_X_OFFSET] = "x-offset",
  180. [VBE_DISPI_INDEX_Y_OFFSET] = "y-offset",
  181. [VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = "video-mem",
  182. };
  183. static const char *vbe_name(u32 index)
  184. {
  185. if (index < ARRAY_SIZE(vbe_name_list))
  186. return vbe_name_list[index];
  187. return "(invalid)";
  188. }
  189. static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
  190. pgoff_t pgoff);
  191. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  192. pgoff_t pgoff);
  193. static void mbochs_create_config_space(struct mdev_state *mdev_state)
  194. {
  195. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID],
  196. 0x1234);
  197. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID],
  198. 0x1111);
  199. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID],
  200. PCI_SUBVENDOR_ID_REDHAT_QUMRANET);
  201. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID],
  202. PCI_SUBDEVICE_ID_QEMU);
  203. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND],
  204. PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  205. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE],
  206. PCI_CLASS_DISPLAY_OTHER);
  207. mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01;
  208. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0],
  209. PCI_BASE_ADDRESS_SPACE_MEMORY |
  210. PCI_BASE_ADDRESS_MEM_TYPE_32 |
  211. PCI_BASE_ADDRESS_MEM_PREFETCH);
  212. mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1;
  213. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_2],
  214. PCI_BASE_ADDRESS_SPACE_MEMORY |
  215. PCI_BASE_ADDRESS_MEM_TYPE_32);
  216. mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1;
  217. }
  218. static int mbochs_check_framebuffer(struct mdev_state *mdev_state,
  219. struct mbochs_mode *mode)
  220. {
  221. struct device *dev = mdev_dev(mdev_state->mdev);
  222. u16 *vbe = mdev_state->vbe;
  223. u32 virt_width;
  224. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  225. if (!(vbe[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED))
  226. goto nofb;
  227. memset(mode, 0, sizeof(*mode));
  228. switch (vbe[VBE_DISPI_INDEX_BPP]) {
  229. case 32:
  230. mode->drm_format = DRM_FORMAT_XRGB8888;
  231. mode->bytepp = 4;
  232. break;
  233. default:
  234. dev_info_ratelimited(dev, "%s: bpp %d not supported\n",
  235. __func__, vbe[VBE_DISPI_INDEX_BPP]);
  236. goto nofb;
  237. }
  238. mode->width = vbe[VBE_DISPI_INDEX_XRES];
  239. mode->height = vbe[VBE_DISPI_INDEX_YRES];
  240. virt_width = vbe[VBE_DISPI_INDEX_VIRT_WIDTH];
  241. if (virt_width < mode->width)
  242. virt_width = mode->width;
  243. mode->stride = virt_width * mode->bytepp;
  244. mode->size = (u64)mode->stride * mode->height;
  245. mode->offset = ((u64)vbe[VBE_DISPI_INDEX_X_OFFSET] * mode->bytepp +
  246. (u64)vbe[VBE_DISPI_INDEX_Y_OFFSET] * mode->stride);
  247. if (mode->width < 64 || mode->height < 64) {
  248. dev_info_ratelimited(dev, "%s: invalid resolution %dx%d\n",
  249. __func__, mode->width, mode->height);
  250. goto nofb;
  251. }
  252. if (mode->offset + mode->size > mdev_state->memsize) {
  253. dev_info_ratelimited(dev, "%s: framebuffer memory overflow\n",
  254. __func__);
  255. goto nofb;
  256. }
  257. return 0;
  258. nofb:
  259. memset(mode, 0, sizeof(*mode));
  260. return -EINVAL;
  261. }
  262. static bool mbochs_modes_equal(struct mbochs_mode *mode1,
  263. struct mbochs_mode *mode2)
  264. {
  265. return memcmp(mode1, mode2, sizeof(struct mbochs_mode)) == 0;
  266. }
  267. static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
  268. char *buf, u32 count)
  269. {
  270. struct device *dev = mdev_dev(mdev_state->mdev);
  271. int index = (offset - PCI_BASE_ADDRESS_0) / 0x04;
  272. u32 cfg_addr;
  273. switch (offset) {
  274. case PCI_BASE_ADDRESS_0:
  275. case PCI_BASE_ADDRESS_2:
  276. cfg_addr = *(u32 *)buf;
  277. if (cfg_addr == 0xffffffff) {
  278. cfg_addr = (cfg_addr & mdev_state->bar_mask[index]);
  279. } else {
  280. cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
  281. if (cfg_addr)
  282. dev_info(dev, "BAR #%d @ 0x%x\n",
  283. index, cfg_addr);
  284. }
  285. cfg_addr |= (mdev_state->vconfig[offset] &
  286. ~PCI_BASE_ADDRESS_MEM_MASK);
  287. STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
  288. break;
  289. }
  290. }
  291. static void handle_mmio_write(struct mdev_state *mdev_state, u16 offset,
  292. char *buf, u32 count)
  293. {
  294. struct device *dev = mdev_dev(mdev_state->mdev);
  295. int index;
  296. u16 reg16;
  297. switch (offset) {
  298. case 0x400 ... 0x41f: /* vga ioports remapped */
  299. goto unhandled;
  300. case 0x500 ... 0x515: /* bochs dispi interface */
  301. if (count != 2)
  302. goto unhandled;
  303. index = (offset - 0x500) / 2;
  304. reg16 = *(u16 *)buf;
  305. if (index < ARRAY_SIZE(mdev_state->vbe))
  306. mdev_state->vbe[index] = reg16;
  307. dev_dbg(dev, "%s: vbe write %d = %d (%s)\n",
  308. __func__, index, reg16, vbe_name(index));
  309. break;
  310. case 0x600 ... 0x607: /* qemu extended regs */
  311. goto unhandled;
  312. default:
  313. unhandled:
  314. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  315. __func__, offset, count);
  316. break;
  317. }
  318. }
  319. static void handle_mmio_read(struct mdev_state *mdev_state, u16 offset,
  320. char *buf, u32 count)
  321. {
  322. struct device *dev = mdev_dev(mdev_state->mdev);
  323. struct vfio_region_gfx_edid *edid;
  324. u16 reg16 = 0;
  325. int index;
  326. switch (offset) {
  327. case 0x000 ... 0x3ff: /* edid block */
  328. edid = &mdev_state->edid_regs;
  329. if (edid->link_state != VFIO_DEVICE_GFX_LINK_STATE_UP ||
  330. offset >= edid->edid_size) {
  331. memset(buf, 0, count);
  332. break;
  333. }
  334. memcpy(buf, mdev_state->edid_blob + offset, count);
  335. break;
  336. case 0x500 ... 0x515: /* bochs dispi interface */
  337. if (count != 2)
  338. goto unhandled;
  339. index = (offset - 0x500) / 2;
  340. if (index < ARRAY_SIZE(mdev_state->vbe))
  341. reg16 = mdev_state->vbe[index];
  342. dev_dbg(dev, "%s: vbe read %d = %d (%s)\n",
  343. __func__, index, reg16, vbe_name(index));
  344. *(u16 *)buf = reg16;
  345. break;
  346. default:
  347. unhandled:
  348. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  349. __func__, offset, count);
  350. memset(buf, 0, count);
  351. break;
  352. }
  353. }
  354. static void handle_edid_regs(struct mdev_state *mdev_state, u16 offset,
  355. char *buf, u32 count, bool is_write)
  356. {
  357. char *regs = (void *)&mdev_state->edid_regs;
  358. if (offset + count > sizeof(mdev_state->edid_regs))
  359. return;
  360. if (count != 4)
  361. return;
  362. if (offset % 4)
  363. return;
  364. if (is_write) {
  365. switch (offset) {
  366. case offsetof(struct vfio_region_gfx_edid, link_state):
  367. case offsetof(struct vfio_region_gfx_edid, edid_size):
  368. memcpy(regs + offset, buf, count);
  369. break;
  370. default:
  371. /* read-only regs */
  372. break;
  373. }
  374. } else {
  375. memcpy(buf, regs + offset, count);
  376. }
  377. }
  378. static void handle_edid_blob(struct mdev_state *mdev_state, u16 offset,
  379. char *buf, u32 count, bool is_write)
  380. {
  381. if (offset + count > mdev_state->edid_regs.edid_max_size)
  382. return;
  383. if (is_write)
  384. memcpy(mdev_state->edid_blob + offset, buf, count);
  385. else
  386. memcpy(buf, mdev_state->edid_blob + offset, count);
  387. }
  388. static ssize_t mdev_access(struct mdev_state *mdev_state, char *buf,
  389. size_t count, loff_t pos, bool is_write)
  390. {
  391. struct page *pg;
  392. loff_t poff;
  393. char *map;
  394. int ret = 0;
  395. mutex_lock(&mdev_state->ops_lock);
  396. if (pos < MBOCHS_CONFIG_SPACE_SIZE) {
  397. if (is_write)
  398. handle_pci_cfg_write(mdev_state, pos, buf, count);
  399. else
  400. memcpy(buf, (mdev_state->vconfig + pos), count);
  401. } else if (pos >= MBOCHS_MMIO_BAR_OFFSET &&
  402. pos + count <= (MBOCHS_MMIO_BAR_OFFSET +
  403. MBOCHS_MMIO_BAR_SIZE)) {
  404. pos -= MBOCHS_MMIO_BAR_OFFSET;
  405. if (is_write)
  406. handle_mmio_write(mdev_state, pos, buf, count);
  407. else
  408. handle_mmio_read(mdev_state, pos, buf, count);
  409. } else if (pos >= MBOCHS_EDID_OFFSET &&
  410. pos + count <= (MBOCHS_EDID_OFFSET +
  411. MBOCHS_EDID_SIZE)) {
  412. pos -= MBOCHS_EDID_OFFSET;
  413. if (pos < MBOCHS_EDID_BLOB_OFFSET) {
  414. handle_edid_regs(mdev_state, pos, buf, count, is_write);
  415. } else {
  416. pos -= MBOCHS_EDID_BLOB_OFFSET;
  417. handle_edid_blob(mdev_state, pos, buf, count, is_write);
  418. }
  419. } else if (pos >= MBOCHS_MEMORY_BAR_OFFSET &&
  420. pos + count <=
  421. MBOCHS_MEMORY_BAR_OFFSET + mdev_state->memsize) {
  422. pos -= MBOCHS_MMIO_BAR_OFFSET;
  423. poff = pos & ~PAGE_MASK;
  424. pg = __mbochs_get_page(mdev_state, pos >> PAGE_SHIFT);
  425. map = kmap(pg);
  426. if (is_write)
  427. memcpy(map + poff, buf, count);
  428. else
  429. memcpy(buf, map + poff, count);
  430. kunmap(pg);
  431. put_page(pg);
  432. } else {
  433. dev_dbg(mdev_state->vdev.dev, "%s: %s @0x%llx (unhandled)\n",
  434. __func__, is_write ? "WR" : "RD", pos);
  435. ret = -1;
  436. goto accessfailed;
  437. }
  438. ret = count;
  439. accessfailed:
  440. mutex_unlock(&mdev_state->ops_lock);
  441. return ret;
  442. }
  443. static int mbochs_reset(struct mdev_state *mdev_state)
  444. {
  445. u32 size64k = mdev_state->memsize / (64 * 1024);
  446. int i;
  447. for (i = 0; i < ARRAY_SIZE(mdev_state->vbe); i++)
  448. mdev_state->vbe[i] = 0;
  449. mdev_state->vbe[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
  450. mdev_state->vbe[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = size64k;
  451. return 0;
  452. }
  453. static int mbochs_init_dev(struct vfio_device *vdev)
  454. {
  455. struct mdev_state *mdev_state =
  456. container_of(vdev, struct mdev_state, vdev);
  457. struct mdev_device *mdev = to_mdev_device(vdev->dev);
  458. struct mbochs_type *type =
  459. container_of(mdev->type, struct mbochs_type, type);
  460. int avail_mbytes = atomic_read(&mbochs_avail_mbytes);
  461. int ret = -ENOMEM;
  462. do {
  463. if (avail_mbytes < type->mbytes)
  464. return -ENOSPC;
  465. } while (!atomic_try_cmpxchg(&mbochs_avail_mbytes, &avail_mbytes,
  466. avail_mbytes - type->mbytes));
  467. mdev_state->vconfig = kzalloc(MBOCHS_CONFIG_SPACE_SIZE, GFP_KERNEL);
  468. if (!mdev_state->vconfig)
  469. goto err_avail;
  470. mdev_state->memsize = type->mbytes * 1024 * 1024;
  471. mdev_state->pagecount = mdev_state->memsize >> PAGE_SHIFT;
  472. mdev_state->pages = kcalloc(mdev_state->pagecount,
  473. sizeof(struct page *),
  474. GFP_KERNEL);
  475. if (!mdev_state->pages)
  476. goto err_vconfig;
  477. mutex_init(&mdev_state->ops_lock);
  478. mdev_state->mdev = mdev;
  479. INIT_LIST_HEAD(&mdev_state->dmabufs);
  480. mdev_state->next_id = 1;
  481. mdev_state->type = type;
  482. mdev_state->edid_regs.max_xres = type->max_x;
  483. mdev_state->edid_regs.max_yres = type->max_y;
  484. mdev_state->edid_regs.edid_offset = MBOCHS_EDID_BLOB_OFFSET;
  485. mdev_state->edid_regs.edid_max_size = sizeof(mdev_state->edid_blob);
  486. mbochs_create_config_space(mdev_state);
  487. mbochs_reset(mdev_state);
  488. dev_info(vdev->dev, "%s: %s, %d MB, %ld pages\n", __func__,
  489. type->type.pretty_name, type->mbytes, mdev_state->pagecount);
  490. return 0;
  491. err_vconfig:
  492. kfree(mdev_state->vconfig);
  493. err_avail:
  494. atomic_add(type->mbytes, &mbochs_avail_mbytes);
  495. return ret;
  496. }
  497. static int mbochs_probe(struct mdev_device *mdev)
  498. {
  499. struct mdev_state *mdev_state;
  500. int ret = -ENOMEM;
  501. mdev_state = vfio_alloc_device(mdev_state, vdev, &mdev->dev,
  502. &mbochs_dev_ops);
  503. if (IS_ERR(mdev_state))
  504. return PTR_ERR(mdev_state);
  505. ret = vfio_register_emulated_iommu_dev(&mdev_state->vdev);
  506. if (ret)
  507. goto err_put_vdev;
  508. dev_set_drvdata(&mdev->dev, mdev_state);
  509. return 0;
  510. err_put_vdev:
  511. vfio_put_device(&mdev_state->vdev);
  512. return ret;
  513. }
  514. static void mbochs_release_dev(struct vfio_device *vdev)
  515. {
  516. struct mdev_state *mdev_state =
  517. container_of(vdev, struct mdev_state, vdev);
  518. atomic_add(mdev_state->type->mbytes, &mbochs_avail_mbytes);
  519. kfree(mdev_state->pages);
  520. kfree(mdev_state->vconfig);
  521. }
  522. static void mbochs_remove(struct mdev_device *mdev)
  523. {
  524. struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev);
  525. vfio_unregister_group_dev(&mdev_state->vdev);
  526. vfio_put_device(&mdev_state->vdev);
  527. }
  528. static ssize_t mbochs_read(struct vfio_device *vdev, char __user *buf,
  529. size_t count, loff_t *ppos)
  530. {
  531. struct mdev_state *mdev_state =
  532. container_of(vdev, struct mdev_state, vdev);
  533. unsigned int done = 0;
  534. int ret;
  535. while (count) {
  536. size_t filled;
  537. if (count >= 4 && !(*ppos % 4)) {
  538. u32 val;
  539. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  540. *ppos, false);
  541. if (ret <= 0)
  542. goto read_err;
  543. if (copy_to_user(buf, &val, sizeof(val)))
  544. goto read_err;
  545. filled = 4;
  546. } else if (count >= 2 && !(*ppos % 2)) {
  547. u16 val;
  548. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  549. *ppos, false);
  550. if (ret <= 0)
  551. goto read_err;
  552. if (copy_to_user(buf, &val, sizeof(val)))
  553. goto read_err;
  554. filled = 2;
  555. } else {
  556. u8 val;
  557. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  558. *ppos, false);
  559. if (ret <= 0)
  560. goto read_err;
  561. if (copy_to_user(buf, &val, sizeof(val)))
  562. goto read_err;
  563. filled = 1;
  564. }
  565. count -= filled;
  566. done += filled;
  567. *ppos += filled;
  568. buf += filled;
  569. }
  570. return done;
  571. read_err:
  572. return -EFAULT;
  573. }
  574. static ssize_t mbochs_write(struct vfio_device *vdev, const char __user *buf,
  575. size_t count, loff_t *ppos)
  576. {
  577. struct mdev_state *mdev_state =
  578. container_of(vdev, struct mdev_state, vdev);
  579. unsigned int done = 0;
  580. int ret;
  581. while (count) {
  582. size_t filled;
  583. if (count >= 4 && !(*ppos % 4)) {
  584. u32 val;
  585. if (copy_from_user(&val, buf, sizeof(val)))
  586. goto write_err;
  587. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  588. *ppos, true);
  589. if (ret <= 0)
  590. goto write_err;
  591. filled = 4;
  592. } else if (count >= 2 && !(*ppos % 2)) {
  593. u16 val;
  594. if (copy_from_user(&val, buf, sizeof(val)))
  595. goto write_err;
  596. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  597. *ppos, true);
  598. if (ret <= 0)
  599. goto write_err;
  600. filled = 2;
  601. } else {
  602. u8 val;
  603. if (copy_from_user(&val, buf, sizeof(val)))
  604. goto write_err;
  605. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  606. *ppos, true);
  607. if (ret <= 0)
  608. goto write_err;
  609. filled = 1;
  610. }
  611. count -= filled;
  612. done += filled;
  613. *ppos += filled;
  614. buf += filled;
  615. }
  616. return done;
  617. write_err:
  618. return -EFAULT;
  619. }
  620. static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
  621. pgoff_t pgoff)
  622. {
  623. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  624. if (!mdev_state->pages[pgoff]) {
  625. mdev_state->pages[pgoff] =
  626. alloc_pages(GFP_HIGHUSER | __GFP_ZERO, 0);
  627. if (!mdev_state->pages[pgoff])
  628. return NULL;
  629. }
  630. get_page(mdev_state->pages[pgoff]);
  631. return mdev_state->pages[pgoff];
  632. }
  633. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  634. pgoff_t pgoff)
  635. {
  636. struct page *page;
  637. if (WARN_ON(pgoff >= mdev_state->pagecount))
  638. return NULL;
  639. mutex_lock(&mdev_state->ops_lock);
  640. page = __mbochs_get_page(mdev_state, pgoff);
  641. mutex_unlock(&mdev_state->ops_lock);
  642. return page;
  643. }
  644. static void mbochs_put_pages(struct mdev_state *mdev_state)
  645. {
  646. struct device *dev = mdev_dev(mdev_state->mdev);
  647. int i, count = 0;
  648. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  649. for (i = 0; i < mdev_state->pagecount; i++) {
  650. if (!mdev_state->pages[i])
  651. continue;
  652. put_page(mdev_state->pages[i]);
  653. mdev_state->pages[i] = NULL;
  654. count++;
  655. }
  656. dev_dbg(dev, "%s: %d pages released\n", __func__, count);
  657. }
  658. static vm_fault_t mbochs_region_vm_fault(struct vm_fault *vmf)
  659. {
  660. struct vm_area_struct *vma = vmf->vma;
  661. struct mdev_state *mdev_state = vma->vm_private_data;
  662. pgoff_t page_offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
  663. if (page_offset >= mdev_state->pagecount)
  664. return VM_FAULT_SIGBUS;
  665. vmf->page = mbochs_get_page(mdev_state, page_offset);
  666. if (!vmf->page)
  667. return VM_FAULT_SIGBUS;
  668. return 0;
  669. }
  670. static const struct vm_operations_struct mbochs_region_vm_ops = {
  671. .fault = mbochs_region_vm_fault,
  672. };
  673. static int mbochs_mmap(struct vfio_device *vdev, struct vm_area_struct *vma)
  674. {
  675. struct mdev_state *mdev_state =
  676. container_of(vdev, struct mdev_state, vdev);
  677. if (vma->vm_pgoff != MBOCHS_MEMORY_BAR_OFFSET >> PAGE_SHIFT)
  678. return -EINVAL;
  679. if (vma->vm_end < vma->vm_start)
  680. return -EINVAL;
  681. if (vma->vm_end - vma->vm_start > mdev_state->memsize)
  682. return -EINVAL;
  683. if ((vma->vm_flags & VM_SHARED) == 0)
  684. return -EINVAL;
  685. vma->vm_ops = &mbochs_region_vm_ops;
  686. vma->vm_private_data = mdev_state;
  687. return 0;
  688. }
  689. static vm_fault_t mbochs_dmabuf_vm_fault(struct vm_fault *vmf)
  690. {
  691. struct vm_area_struct *vma = vmf->vma;
  692. struct mbochs_dmabuf *dmabuf = vma->vm_private_data;
  693. if (WARN_ON(vmf->pgoff >= dmabuf->pagecount))
  694. return VM_FAULT_SIGBUS;
  695. vmf->page = dmabuf->pages[vmf->pgoff];
  696. get_page(vmf->page);
  697. return 0;
  698. }
  699. static const struct vm_operations_struct mbochs_dmabuf_vm_ops = {
  700. .fault = mbochs_dmabuf_vm_fault,
  701. };
  702. static int mbochs_mmap_dmabuf(struct dma_buf *buf, struct vm_area_struct *vma)
  703. {
  704. struct mbochs_dmabuf *dmabuf = buf->priv;
  705. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  706. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  707. if ((vma->vm_flags & VM_SHARED) == 0)
  708. return -EINVAL;
  709. vma->vm_ops = &mbochs_dmabuf_vm_ops;
  710. vma->vm_private_data = dmabuf;
  711. return 0;
  712. }
  713. static void mbochs_print_dmabuf(struct mbochs_dmabuf *dmabuf,
  714. const char *prefix)
  715. {
  716. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  717. u32 fourcc = dmabuf->mode.drm_format;
  718. dev_dbg(dev, "%s/%d: %c%c%c%c, %dx%d, stride %d, off 0x%llx, size 0x%llx, pages %ld\n",
  719. prefix, dmabuf->id,
  720. fourcc ? ((fourcc >> 0) & 0xff) : '-',
  721. fourcc ? ((fourcc >> 8) & 0xff) : '-',
  722. fourcc ? ((fourcc >> 16) & 0xff) : '-',
  723. fourcc ? ((fourcc >> 24) & 0xff) : '-',
  724. dmabuf->mode.width, dmabuf->mode.height, dmabuf->mode.stride,
  725. dmabuf->mode.offset, dmabuf->mode.size, dmabuf->pagecount);
  726. }
  727. static struct sg_table *mbochs_map_dmabuf(struct dma_buf_attachment *at,
  728. enum dma_data_direction direction)
  729. {
  730. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  731. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  732. struct sg_table *sg;
  733. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  734. sg = kzalloc(sizeof(*sg), GFP_KERNEL);
  735. if (!sg)
  736. goto err1;
  737. if (sg_alloc_table_from_pages(sg, dmabuf->pages, dmabuf->pagecount,
  738. 0, dmabuf->mode.size, GFP_KERNEL) < 0)
  739. goto err2;
  740. if (dma_map_sgtable(at->dev, sg, direction, 0))
  741. goto err3;
  742. return sg;
  743. err3:
  744. sg_free_table(sg);
  745. err2:
  746. kfree(sg);
  747. err1:
  748. return ERR_PTR(-ENOMEM);
  749. }
  750. static void mbochs_unmap_dmabuf(struct dma_buf_attachment *at,
  751. struct sg_table *sg,
  752. enum dma_data_direction direction)
  753. {
  754. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  755. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  756. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  757. dma_unmap_sgtable(at->dev, sg, direction, 0);
  758. sg_free_table(sg);
  759. kfree(sg);
  760. }
  761. static void mbochs_release_dmabuf(struct dma_buf *buf)
  762. {
  763. struct mbochs_dmabuf *dmabuf = buf->priv;
  764. struct mdev_state *mdev_state = dmabuf->mdev_state;
  765. struct device *dev = mdev_dev(mdev_state->mdev);
  766. pgoff_t pg;
  767. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  768. for (pg = 0; pg < dmabuf->pagecount; pg++)
  769. put_page(dmabuf->pages[pg]);
  770. mutex_lock(&mdev_state->ops_lock);
  771. dmabuf->buf = NULL;
  772. if (dmabuf->unlinked)
  773. kfree(dmabuf);
  774. mutex_unlock(&mdev_state->ops_lock);
  775. }
  776. static struct dma_buf_ops mbochs_dmabuf_ops = {
  777. .map_dma_buf = mbochs_map_dmabuf,
  778. .unmap_dma_buf = mbochs_unmap_dmabuf,
  779. .release = mbochs_release_dmabuf,
  780. .mmap = mbochs_mmap_dmabuf,
  781. };
  782. static struct mbochs_dmabuf *mbochs_dmabuf_alloc(struct mdev_state *mdev_state,
  783. struct mbochs_mode *mode)
  784. {
  785. struct mbochs_dmabuf *dmabuf;
  786. pgoff_t page_offset, pg;
  787. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  788. dmabuf = kzalloc(sizeof(struct mbochs_dmabuf), GFP_KERNEL);
  789. if (!dmabuf)
  790. return NULL;
  791. dmabuf->mode = *mode;
  792. dmabuf->id = mdev_state->next_id++;
  793. dmabuf->pagecount = DIV_ROUND_UP(mode->size, PAGE_SIZE);
  794. dmabuf->pages = kcalloc(dmabuf->pagecount, sizeof(struct page *),
  795. GFP_KERNEL);
  796. if (!dmabuf->pages)
  797. goto err_free_dmabuf;
  798. page_offset = dmabuf->mode.offset >> PAGE_SHIFT;
  799. for (pg = 0; pg < dmabuf->pagecount; pg++) {
  800. dmabuf->pages[pg] = __mbochs_get_page(mdev_state,
  801. page_offset + pg);
  802. if (!dmabuf->pages[pg])
  803. goto err_free_pages;
  804. }
  805. dmabuf->mdev_state = mdev_state;
  806. list_add(&dmabuf->next, &mdev_state->dmabufs);
  807. mbochs_print_dmabuf(dmabuf, __func__);
  808. return dmabuf;
  809. err_free_pages:
  810. while (pg > 0)
  811. put_page(dmabuf->pages[--pg]);
  812. kfree(dmabuf->pages);
  813. err_free_dmabuf:
  814. kfree(dmabuf);
  815. return NULL;
  816. }
  817. static struct mbochs_dmabuf *
  818. mbochs_dmabuf_find_by_mode(struct mdev_state *mdev_state,
  819. struct mbochs_mode *mode)
  820. {
  821. struct mbochs_dmabuf *dmabuf;
  822. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  823. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  824. if (mbochs_modes_equal(&dmabuf->mode, mode))
  825. return dmabuf;
  826. return NULL;
  827. }
  828. static struct mbochs_dmabuf *
  829. mbochs_dmabuf_find_by_id(struct mdev_state *mdev_state, u32 id)
  830. {
  831. struct mbochs_dmabuf *dmabuf;
  832. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  833. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  834. if (dmabuf->id == id)
  835. return dmabuf;
  836. return NULL;
  837. }
  838. static int mbochs_dmabuf_export(struct mbochs_dmabuf *dmabuf)
  839. {
  840. struct mdev_state *mdev_state = dmabuf->mdev_state;
  841. struct device *dev = mdev_state->vdev.dev;
  842. DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
  843. struct dma_buf *buf;
  844. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  845. if (!IS_ALIGNED(dmabuf->mode.offset, PAGE_SIZE)) {
  846. dev_info_ratelimited(dev, "%s: framebuffer not page-aligned\n",
  847. __func__);
  848. return -EINVAL;
  849. }
  850. exp_info.ops = &mbochs_dmabuf_ops;
  851. exp_info.size = dmabuf->mode.size;
  852. exp_info.priv = dmabuf;
  853. buf = dma_buf_export(&exp_info);
  854. if (IS_ERR(buf)) {
  855. dev_info_ratelimited(dev, "%s: dma_buf_export failed: %ld\n",
  856. __func__, PTR_ERR(buf));
  857. return PTR_ERR(buf);
  858. }
  859. dmabuf->buf = buf;
  860. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  861. return 0;
  862. }
  863. static int mbochs_get_region_info(struct mdev_state *mdev_state,
  864. struct vfio_region_info_ext *ext)
  865. {
  866. struct vfio_region_info *region_info = &ext->base;
  867. if (region_info->index >= MBOCHS_NUM_REGIONS)
  868. return -EINVAL;
  869. switch (region_info->index) {
  870. case VFIO_PCI_CONFIG_REGION_INDEX:
  871. region_info->offset = 0;
  872. region_info->size = MBOCHS_CONFIG_SPACE_SIZE;
  873. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  874. VFIO_REGION_INFO_FLAG_WRITE);
  875. break;
  876. case VFIO_PCI_BAR0_REGION_INDEX:
  877. region_info->offset = MBOCHS_MEMORY_BAR_OFFSET;
  878. region_info->size = mdev_state->memsize;
  879. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  880. VFIO_REGION_INFO_FLAG_WRITE |
  881. VFIO_REGION_INFO_FLAG_MMAP);
  882. break;
  883. case VFIO_PCI_BAR2_REGION_INDEX:
  884. region_info->offset = MBOCHS_MMIO_BAR_OFFSET;
  885. region_info->size = MBOCHS_MMIO_BAR_SIZE;
  886. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  887. VFIO_REGION_INFO_FLAG_WRITE);
  888. break;
  889. case MBOCHS_EDID_REGION_INDEX:
  890. ext->base.argsz = sizeof(*ext);
  891. ext->base.offset = MBOCHS_EDID_OFFSET;
  892. ext->base.size = MBOCHS_EDID_SIZE;
  893. ext->base.flags = (VFIO_REGION_INFO_FLAG_READ |
  894. VFIO_REGION_INFO_FLAG_WRITE |
  895. VFIO_REGION_INFO_FLAG_CAPS);
  896. ext->base.cap_offset = offsetof(typeof(*ext), type);
  897. ext->type.header.id = VFIO_REGION_INFO_CAP_TYPE;
  898. ext->type.header.version = 1;
  899. ext->type.header.next = 0;
  900. ext->type.type = VFIO_REGION_TYPE_GFX;
  901. ext->type.subtype = VFIO_REGION_SUBTYPE_GFX_EDID;
  902. break;
  903. default:
  904. region_info->size = 0;
  905. region_info->offset = 0;
  906. region_info->flags = 0;
  907. }
  908. return 0;
  909. }
  910. static int mbochs_get_irq_info(struct vfio_irq_info *irq_info)
  911. {
  912. irq_info->count = 0;
  913. return 0;
  914. }
  915. static int mbochs_get_device_info(struct vfio_device_info *dev_info)
  916. {
  917. dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
  918. dev_info->num_regions = MBOCHS_NUM_REGIONS;
  919. dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
  920. return 0;
  921. }
  922. static int mbochs_query_gfx_plane(struct mdev_state *mdev_state,
  923. struct vfio_device_gfx_plane_info *plane)
  924. {
  925. struct mbochs_dmabuf *dmabuf;
  926. struct mbochs_mode mode;
  927. int ret;
  928. if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {
  929. if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |
  930. VFIO_GFX_PLANE_TYPE_DMABUF))
  931. return 0;
  932. return -EINVAL;
  933. }
  934. if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF)
  935. return -EINVAL;
  936. plane->drm_format_mod = 0;
  937. plane->x_pos = 0;
  938. plane->y_pos = 0;
  939. plane->x_hot = 0;
  940. plane->y_hot = 0;
  941. mutex_lock(&mdev_state->ops_lock);
  942. ret = -EINVAL;
  943. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY)
  944. ret = mbochs_check_framebuffer(mdev_state, &mode);
  945. if (ret < 0) {
  946. plane->drm_format = 0;
  947. plane->width = 0;
  948. plane->height = 0;
  949. plane->stride = 0;
  950. plane->size = 0;
  951. plane->dmabuf_id = 0;
  952. goto done;
  953. }
  954. dmabuf = mbochs_dmabuf_find_by_mode(mdev_state, &mode);
  955. if (!dmabuf)
  956. mbochs_dmabuf_alloc(mdev_state, &mode);
  957. if (!dmabuf) {
  958. mutex_unlock(&mdev_state->ops_lock);
  959. return -ENOMEM;
  960. }
  961. plane->drm_format = dmabuf->mode.drm_format;
  962. plane->width = dmabuf->mode.width;
  963. plane->height = dmabuf->mode.height;
  964. plane->stride = dmabuf->mode.stride;
  965. plane->size = dmabuf->mode.size;
  966. plane->dmabuf_id = dmabuf->id;
  967. done:
  968. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY &&
  969. mdev_state->active_id != plane->dmabuf_id) {
  970. dev_dbg(mdev_state->vdev.dev, "%s: primary: %d => %d\n",
  971. __func__, mdev_state->active_id, plane->dmabuf_id);
  972. mdev_state->active_id = plane->dmabuf_id;
  973. }
  974. mutex_unlock(&mdev_state->ops_lock);
  975. return 0;
  976. }
  977. static int mbochs_get_gfx_dmabuf(struct mdev_state *mdev_state, u32 id)
  978. {
  979. struct mbochs_dmabuf *dmabuf;
  980. mutex_lock(&mdev_state->ops_lock);
  981. dmabuf = mbochs_dmabuf_find_by_id(mdev_state, id);
  982. if (!dmabuf) {
  983. mutex_unlock(&mdev_state->ops_lock);
  984. return -ENOENT;
  985. }
  986. if (!dmabuf->buf)
  987. mbochs_dmabuf_export(dmabuf);
  988. mutex_unlock(&mdev_state->ops_lock);
  989. if (!dmabuf->buf)
  990. return -EINVAL;
  991. return dma_buf_fd(dmabuf->buf, 0);
  992. }
  993. static long mbochs_ioctl(struct vfio_device *vdev, unsigned int cmd,
  994. unsigned long arg)
  995. {
  996. struct mdev_state *mdev_state =
  997. container_of(vdev, struct mdev_state, vdev);
  998. int ret = 0;
  999. unsigned long minsz, outsz;
  1000. switch (cmd) {
  1001. case VFIO_DEVICE_GET_INFO:
  1002. {
  1003. struct vfio_device_info info;
  1004. minsz = offsetofend(struct vfio_device_info, num_irqs);
  1005. if (copy_from_user(&info, (void __user *)arg, minsz))
  1006. return -EFAULT;
  1007. if (info.argsz < minsz)
  1008. return -EINVAL;
  1009. ret = mbochs_get_device_info(&info);
  1010. if (ret)
  1011. return ret;
  1012. if (copy_to_user((void __user *)arg, &info, minsz))
  1013. return -EFAULT;
  1014. return 0;
  1015. }
  1016. case VFIO_DEVICE_GET_REGION_INFO:
  1017. {
  1018. struct vfio_region_info_ext info;
  1019. minsz = offsetofend(typeof(info), base.offset);
  1020. if (copy_from_user(&info, (void __user *)arg, minsz))
  1021. return -EFAULT;
  1022. outsz = info.base.argsz;
  1023. if (outsz < minsz)
  1024. return -EINVAL;
  1025. if (outsz > sizeof(info))
  1026. return -EINVAL;
  1027. ret = mbochs_get_region_info(mdev_state, &info);
  1028. if (ret)
  1029. return ret;
  1030. if (copy_to_user((void __user *)arg, &info, outsz))
  1031. return -EFAULT;
  1032. return 0;
  1033. }
  1034. case VFIO_DEVICE_GET_IRQ_INFO:
  1035. {
  1036. struct vfio_irq_info info;
  1037. minsz = offsetofend(struct vfio_irq_info, count);
  1038. if (copy_from_user(&info, (void __user *)arg, minsz))
  1039. return -EFAULT;
  1040. if ((info.argsz < minsz) ||
  1041. (info.index >= VFIO_PCI_NUM_IRQS))
  1042. return -EINVAL;
  1043. ret = mbochs_get_irq_info(&info);
  1044. if (ret)
  1045. return ret;
  1046. if (copy_to_user((void __user *)arg, &info, minsz))
  1047. return -EFAULT;
  1048. return 0;
  1049. }
  1050. case VFIO_DEVICE_QUERY_GFX_PLANE:
  1051. {
  1052. struct vfio_device_gfx_plane_info plane = {};
  1053. minsz = offsetofend(struct vfio_device_gfx_plane_info,
  1054. region_index);
  1055. if (copy_from_user(&plane, (void __user *)arg, minsz))
  1056. return -EFAULT;
  1057. if (plane.argsz < minsz)
  1058. return -EINVAL;
  1059. ret = mbochs_query_gfx_plane(mdev_state, &plane);
  1060. if (ret)
  1061. return ret;
  1062. if (copy_to_user((void __user *)arg, &plane, minsz))
  1063. return -EFAULT;
  1064. return 0;
  1065. }
  1066. case VFIO_DEVICE_GET_GFX_DMABUF:
  1067. {
  1068. u32 dmabuf_id;
  1069. if (get_user(dmabuf_id, (__u32 __user *)arg))
  1070. return -EFAULT;
  1071. return mbochs_get_gfx_dmabuf(mdev_state, dmabuf_id);
  1072. }
  1073. case VFIO_DEVICE_SET_IRQS:
  1074. return -EINVAL;
  1075. case VFIO_DEVICE_RESET:
  1076. return mbochs_reset(mdev_state);
  1077. }
  1078. return -ENOTTY;
  1079. }
  1080. static void mbochs_close_device(struct vfio_device *vdev)
  1081. {
  1082. struct mdev_state *mdev_state =
  1083. container_of(vdev, struct mdev_state, vdev);
  1084. struct mbochs_dmabuf *dmabuf, *tmp;
  1085. mutex_lock(&mdev_state->ops_lock);
  1086. list_for_each_entry_safe(dmabuf, tmp, &mdev_state->dmabufs, next) {
  1087. list_del(&dmabuf->next);
  1088. if (dmabuf->buf) {
  1089. /* free in mbochs_release_dmabuf() */
  1090. dmabuf->unlinked = true;
  1091. } else {
  1092. kfree(dmabuf);
  1093. }
  1094. }
  1095. mbochs_put_pages(mdev_state);
  1096. mutex_unlock(&mdev_state->ops_lock);
  1097. }
  1098. static ssize_t
  1099. memory_show(struct device *dev, struct device_attribute *attr,
  1100. char *buf)
  1101. {
  1102. struct mdev_state *mdev_state = dev_get_drvdata(dev);
  1103. return sprintf(buf, "%d MB\n", mdev_state->type->mbytes);
  1104. }
  1105. static DEVICE_ATTR_RO(memory);
  1106. static struct attribute *mdev_dev_attrs[] = {
  1107. &dev_attr_memory.attr,
  1108. NULL,
  1109. };
  1110. static const struct attribute_group mdev_dev_group = {
  1111. .name = "vendor",
  1112. .attrs = mdev_dev_attrs,
  1113. };
  1114. static const struct attribute_group *mdev_dev_groups[] = {
  1115. &mdev_dev_group,
  1116. NULL,
  1117. };
  1118. static ssize_t mbochs_show_description(struct mdev_type *mtype, char *buf)
  1119. {
  1120. struct mbochs_type *type =
  1121. container_of(mtype, struct mbochs_type, type);
  1122. return sprintf(buf, "virtual display, %d MB video memory\n",
  1123. type ? type->mbytes : 0);
  1124. }
  1125. static unsigned int mbochs_get_available(struct mdev_type *mtype)
  1126. {
  1127. struct mbochs_type *type =
  1128. container_of(mtype, struct mbochs_type, type);
  1129. return atomic_read(&mbochs_avail_mbytes) / type->mbytes;
  1130. }
  1131. static const struct vfio_device_ops mbochs_dev_ops = {
  1132. .close_device = mbochs_close_device,
  1133. .init = mbochs_init_dev,
  1134. .release = mbochs_release_dev,
  1135. .read = mbochs_read,
  1136. .write = mbochs_write,
  1137. .ioctl = mbochs_ioctl,
  1138. .mmap = mbochs_mmap,
  1139. .bind_iommufd = vfio_iommufd_emulated_bind,
  1140. .unbind_iommufd = vfio_iommufd_emulated_unbind,
  1141. .attach_ioas = vfio_iommufd_emulated_attach_ioas,
  1142. .detach_ioas = vfio_iommufd_emulated_detach_ioas,
  1143. };
  1144. static struct mdev_driver mbochs_driver = {
  1145. .device_api = VFIO_DEVICE_API_PCI_STRING,
  1146. .driver = {
  1147. .name = "mbochs",
  1148. .owner = THIS_MODULE,
  1149. .mod_name = KBUILD_MODNAME,
  1150. .dev_groups = mdev_dev_groups,
  1151. },
  1152. .probe = mbochs_probe,
  1153. .remove = mbochs_remove,
  1154. .get_available = mbochs_get_available,
  1155. .show_description = mbochs_show_description,
  1156. };
  1157. static const struct file_operations vd_fops = {
  1158. .owner = THIS_MODULE,
  1159. };
  1160. static void mbochs_device_release(struct device *dev)
  1161. {
  1162. /* nothing */
  1163. }
  1164. static int __init mbochs_dev_init(void)
  1165. {
  1166. int ret = 0;
  1167. atomic_set(&mbochs_avail_mbytes, max_mbytes);
  1168. ret = alloc_chrdev_region(&mbochs_devt, 0, MINORMASK + 1, MBOCHS_NAME);
  1169. if (ret < 0) {
  1170. pr_err("Error: failed to register mbochs_dev, err: %d\n", ret);
  1171. return ret;
  1172. }
  1173. cdev_init(&mbochs_cdev, &vd_fops);
  1174. cdev_add(&mbochs_cdev, mbochs_devt, MINORMASK + 1);
  1175. pr_info("%s: major %d\n", __func__, MAJOR(mbochs_devt));
  1176. ret = mdev_register_driver(&mbochs_driver);
  1177. if (ret)
  1178. goto err_cdev;
  1179. ret = class_register(&mbochs_class);
  1180. if (ret)
  1181. goto err_driver;
  1182. mbochs_dev.class = &mbochs_class;
  1183. mbochs_dev.release = mbochs_device_release;
  1184. dev_set_name(&mbochs_dev, "%s", MBOCHS_NAME);
  1185. ret = device_register(&mbochs_dev);
  1186. if (ret)
  1187. goto err_put;
  1188. ret = mdev_register_parent(&mbochs_parent, &mbochs_dev, &mbochs_driver,
  1189. mbochs_mdev_types,
  1190. ARRAY_SIZE(mbochs_mdev_types));
  1191. if (ret)
  1192. goto err_device;
  1193. return 0;
  1194. err_device:
  1195. device_del(&mbochs_dev);
  1196. err_put:
  1197. put_device(&mbochs_dev);
  1198. class_unregister(&mbochs_class);
  1199. err_driver:
  1200. mdev_unregister_driver(&mbochs_driver);
  1201. err_cdev:
  1202. cdev_del(&mbochs_cdev);
  1203. unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
  1204. return ret;
  1205. }
  1206. static void __exit mbochs_dev_exit(void)
  1207. {
  1208. mbochs_dev.bus = NULL;
  1209. mdev_unregister_parent(&mbochs_parent);
  1210. device_unregister(&mbochs_dev);
  1211. mdev_unregister_driver(&mbochs_driver);
  1212. cdev_del(&mbochs_cdev);
  1213. unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
  1214. class_unregister(&mbochs_class);
  1215. }
  1216. MODULE_IMPORT_NS(DMA_BUF);
  1217. module_init(mbochs_dev_init)
  1218. module_exit(mbochs_dev_exit)