clk.c 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013 Soren Brinkmann <soren.brinkmann@xilinx.com>
  4. * Copyright (C) 2013 Xilinx, Inc. All rights reserved.
  5. */
  6. #include <clk.h>
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <init.h>
  10. #include <malloc.h>
  11. #include <asm/arch/clk.h>
  12. #include <asm/global_data.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. static const char * const clk_names[clk_max] = {
  15. "armpll", "ddrpll", "iopll",
  16. "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
  17. "ddr2x", "ddr3x", "dci",
  18. "lqspi", "smc", "pcap", "gem0", "gem1",
  19. "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
  20. "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
  21. "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
  22. "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
  23. "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
  24. "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
  25. "smc_aper", "swdt", "dbg_trc", "dbg_apb"
  26. };
  27. /**
  28. * set_cpu_clk_info() - Setup clock information
  29. *
  30. * This function is called from common code after relocation and sets up the
  31. * clock information.
  32. */
  33. int set_cpu_clk_info(void)
  34. {
  35. struct clk clk;
  36. struct udevice *dev;
  37. ulong rate;
  38. int i, ret;
  39. ret = uclass_get_device_by_driver(UCLASS_CLK,
  40. DM_DRIVER_GET(zynq_clk), &dev);
  41. if (ret)
  42. return ret;
  43. for (i = 0; i < 2; i++) {
  44. clk.id = i ? ddr3x_clk : cpu_6or4x_clk;
  45. ret = clk_request(dev, &clk);
  46. if (ret < 0)
  47. return ret;
  48. rate = clk_get_rate(&clk) / 1000000;
  49. if (i) {
  50. gd->bd->bi_ddr_freq = rate;
  51. } else {
  52. gd->bd->bi_arm_freq = rate;
  53. gd->cpu_clk = clk_get_rate(&clk);
  54. }
  55. clk_free(&clk);
  56. }
  57. gd->bd->bi_dsp_freq = 0;
  58. return 0;
  59. }
  60. /**
  61. * soc_clk_dump() - Print clock frequencies
  62. * Returns zero on success
  63. *
  64. * Implementation for the clk dump command.
  65. */
  66. int soc_clk_dump(void)
  67. {
  68. struct udevice *dev;
  69. int i, ret;
  70. ret = uclass_get_device_by_driver(UCLASS_CLK,
  71. DM_DRIVER_GET(zynq_clk), &dev);
  72. if (ret)
  73. return ret;
  74. printf("clk\t\tfrequency\n");
  75. for (i = 0; i < clk_max; i++) {
  76. const char *name = clk_names[i];
  77. if (name) {
  78. struct clk clk;
  79. unsigned long rate;
  80. clk.id = i;
  81. ret = clk_request(dev, &clk);
  82. if (ret < 0)
  83. return ret;
  84. rate = clk_get_rate(&clk);
  85. clk_free(&clk);
  86. if ((rate == (unsigned long)-ENOSYS) ||
  87. (rate == (unsigned long)-ENXIO))
  88. printf("%10s%20s\n", name, "unknown");
  89. else
  90. printf("%10s%20lu\n", name, rate);
  91. }
  92. }
  93. return 0;
  94. }