huangliang
4b7a0684d9
first debug version
|
3 months ago | |
|---|---|---|
| .. | ||
| README.altera_spi | 3 months ago | |
| README.ftssp010_spi_test | 3 months ago | |
| README.sandbox-spi | 3 months ago | |
| README.sh_qspi_test | 3 months ago | |
| status.txt | 3 months ago | |
README.altera_spi
SoCFPGA EPCS/EPCQx1 mini howto:
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work