dma-uclass.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Direct Memory Access U-Class driver
  4. *
  5. * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
  6. * Copyright (C) 2015 - 2018 Texas Instruments Incorporated <www.ti.com>
  7. * Written by Mugunthan V N <mugunthanvnm@ti.com>
  8. *
  9. * Author: Mugunthan V N <mugunthanvnm@ti.com>
  10. */
  11. #define LOG_CATEGORY UCLASS_DMA
  12. #include <common.h>
  13. #include <cpu_func.h>
  14. #include <dm.h>
  15. #include <log.h>
  16. #include <malloc.h>
  17. #include <asm/cache.h>
  18. #include <dm/read.h>
  19. #include <dma-uclass.h>
  20. #include <linux/dma-mapping.h>
  21. #include <dt-structs.h>
  22. #include <errno.h>
  23. #ifdef CONFIG_DMA_CHANNELS
  24. static inline struct dma_ops *dma_dev_ops(struct udevice *dev)
  25. {
  26. return (struct dma_ops *)dev->driver->ops;
  27. }
  28. # if CONFIG_IS_ENABLED(OF_CONTROL)
  29. static int dma_of_xlate_default(struct dma *dma,
  30. struct ofnode_phandle_args *args)
  31. {
  32. debug("%s(dma=%p)\n", __func__, dma);
  33. if (args->args_count > 1) {
  34. pr_err("Invalid args_count: %d\n", args->args_count);
  35. return -EINVAL;
  36. }
  37. if (args->args_count)
  38. dma->id = args->args[0];
  39. else
  40. dma->id = 0;
  41. return 0;
  42. }
  43. int dma_get_by_index(struct udevice *dev, int index, struct dma *dma)
  44. {
  45. int ret;
  46. struct ofnode_phandle_args args;
  47. struct udevice *dev_dma;
  48. const struct dma_ops *ops;
  49. debug("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma);
  50. assert(dma);
  51. dma->dev = NULL;
  52. ret = dev_read_phandle_with_args(dev, "dmas", "#dma-cells", 0, index,
  53. &args);
  54. if (ret) {
  55. pr_err("%s: dev_read_phandle_with_args failed: err=%d\n",
  56. __func__, ret);
  57. return ret;
  58. }
  59. ret = uclass_get_device_by_ofnode(UCLASS_DMA, args.node, &dev_dma);
  60. if (ret) {
  61. pr_err("%s: uclass_get_device_by_ofnode failed: err=%d\n",
  62. __func__, ret);
  63. return ret;
  64. }
  65. dma->dev = dev_dma;
  66. ops = dma_dev_ops(dev_dma);
  67. if (ops->of_xlate)
  68. ret = ops->of_xlate(dma, &args);
  69. else
  70. ret = dma_of_xlate_default(dma, &args);
  71. if (ret) {
  72. pr_err("of_xlate() failed: %d\n", ret);
  73. return ret;
  74. }
  75. return dma_request(dev_dma, dma);
  76. }
  77. int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma)
  78. {
  79. int index;
  80. debug("%s(dev=%p, name=%s, dma=%p)\n", __func__, dev, name, dma);
  81. dma->dev = NULL;
  82. index = dev_read_stringlist_search(dev, "dma-names", name);
  83. if (index < 0) {
  84. pr_err("dev_read_stringlist_search() failed: %d\n", index);
  85. return index;
  86. }
  87. return dma_get_by_index(dev, index, dma);
  88. }
  89. # endif /* OF_CONTROL */
  90. int dma_request(struct udevice *dev, struct dma *dma)
  91. {
  92. struct dma_ops *ops = dma_dev_ops(dev);
  93. debug("%s(dev=%p, dma=%p)\n", __func__, dev, dma);
  94. dma->dev = dev;
  95. if (!ops->request)
  96. return 0;
  97. return ops->request(dma);
  98. }
  99. int dma_free(struct dma *dma)
  100. {
  101. struct dma_ops *ops = dma_dev_ops(dma->dev);
  102. debug("%s(dma=%p)\n", __func__, dma);
  103. if (!ops->rfree)
  104. return 0;
  105. return ops->rfree(dma);
  106. }
  107. int dma_enable(struct dma *dma)
  108. {
  109. struct dma_ops *ops = dma_dev_ops(dma->dev);
  110. debug("%s(dma=%p)\n", __func__, dma);
  111. if (!ops->enable)
  112. return -ENOSYS;
  113. return ops->enable(dma);
  114. }
  115. int dma_disable(struct dma *dma)
  116. {
  117. struct dma_ops *ops = dma_dev_ops(dma->dev);
  118. debug("%s(dma=%p)\n", __func__, dma);
  119. if (!ops->disable)
  120. return -ENOSYS;
  121. return ops->disable(dma);
  122. }
  123. int dma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
  124. {
  125. struct dma_ops *ops = dma_dev_ops(dma->dev);
  126. debug("%s(dma=%p)\n", __func__, dma);
  127. if (!ops->prepare_rcv_buf)
  128. return -1;
  129. return ops->prepare_rcv_buf(dma, dst, size);
  130. }
  131. int dma_receive(struct dma *dma, void **dst, void *metadata)
  132. {
  133. struct dma_ops *ops = dma_dev_ops(dma->dev);
  134. debug("%s(dma=%p)\n", __func__, dma);
  135. if (!ops->receive)
  136. return -ENOSYS;
  137. return ops->receive(dma, dst, metadata);
  138. }
  139. int dma_send(struct dma *dma, void *src, size_t len, void *metadata)
  140. {
  141. struct dma_ops *ops = dma_dev_ops(dma->dev);
  142. debug("%s(dma=%p)\n", __func__, dma);
  143. if (!ops->send)
  144. return -ENOSYS;
  145. return ops->send(dma, src, len, metadata);
  146. }
  147. int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data)
  148. {
  149. struct dma_ops *ops = dma_dev_ops(dma->dev);
  150. debug("%s(dma=%p)\n", __func__, dma);
  151. if (!ops->get_cfg)
  152. return -ENOSYS;
  153. return ops->get_cfg(dma, cfg_id, cfg_data);
  154. }
  155. #endif /* CONFIG_DMA_CHANNELS */
  156. int dma_get_device(u32 transfer_type, struct udevice **devp)
  157. {
  158. struct udevice *dev;
  159. for (uclass_first_device(UCLASS_DMA, &dev); dev;
  160. uclass_next_device(&dev)) {
  161. struct dma_dev_priv *uc_priv;
  162. uc_priv = dev_get_uclass_priv(dev);
  163. if (uc_priv->supported & transfer_type)
  164. break;
  165. }
  166. if (!dev) {
  167. pr_debug("No DMA device found that supports %x type\n",
  168. transfer_type);
  169. return -EPROTONOSUPPORT;
  170. }
  171. *devp = dev;
  172. return 0;
  173. }
  174. int dma_memcpy(void *dst, void *src, size_t len)
  175. {
  176. struct udevice *dev;
  177. const struct dma_ops *ops;
  178. dma_addr_t destination;
  179. dma_addr_t source;
  180. int ret;
  181. ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
  182. if (ret < 0)
  183. return ret;
  184. ops = device_get_ops(dev);
  185. if (!ops->transfer)
  186. return -ENOSYS;
  187. /* Clean the areas, so no writeback into the RAM races with DMA */
  188. destination = dma_map_single(dst, len, DMA_FROM_DEVICE);
  189. source = dma_map_single(src, len, DMA_TO_DEVICE);
  190. ret = ops->transfer(dev, DMA_MEM_TO_MEM, destination, source, len);
  191. /* Clean+Invalidate the areas after, so we can see DMA'd data */
  192. dma_unmap_single(destination, len, DMA_FROM_DEVICE);
  193. dma_unmap_single(source, len, DMA_TO_DEVICE);
  194. return ret;
  195. }
  196. UCLASS_DRIVER(dma) = {
  197. .id = UCLASS_DMA,
  198. .name = "dma",
  199. .flags = DM_UC_FLAG_SEQ_ALIAS,
  200. .per_device_auto = sizeof(struct dma_dev_priv),
  201. };