sunxi_gpio.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
  4. *
  5. * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
  6. *
  7. * (C) Copyright 2007-2011
  8. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  9. * Tom Cubie <tangliang@allwinnertech.com>
  10. */
  11. #include <common.h>
  12. #include <dm.h>
  13. #include <errno.h>
  14. #include <fdtdec.h>
  15. #include <malloc.h>
  16. #include <asm/io.h>
  17. #include <asm/gpio.h>
  18. #include <dt-bindings/gpio/gpio.h>
  19. #if !CONFIG_IS_ENABLED(DM_GPIO)
  20. static int sunxi_gpio_output(u32 pin, u32 val)
  21. {
  22. u32 dat;
  23. u32 bank = GPIO_BANK(pin);
  24. u32 num = GPIO_NUM(pin);
  25. struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
  26. dat = readl(&pio->dat);
  27. if (val)
  28. dat |= 0x1 << num;
  29. else
  30. dat &= ~(0x1 << num);
  31. writel(dat, &pio->dat);
  32. return 0;
  33. }
  34. static int sunxi_gpio_input(u32 pin)
  35. {
  36. u32 dat;
  37. u32 bank = GPIO_BANK(pin);
  38. u32 num = GPIO_NUM(pin);
  39. struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
  40. dat = readl(&pio->dat);
  41. dat >>= num;
  42. return dat & 0x1;
  43. }
  44. int gpio_request(unsigned gpio, const char *label)
  45. {
  46. return 0;
  47. }
  48. int gpio_free(unsigned gpio)
  49. {
  50. return 0;
  51. }
  52. int gpio_direction_input(unsigned gpio)
  53. {
  54. sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
  55. return 0;
  56. }
  57. int gpio_direction_output(unsigned gpio, int value)
  58. {
  59. sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
  60. return sunxi_gpio_output(gpio, value);
  61. }
  62. int gpio_get_value(unsigned gpio)
  63. {
  64. return sunxi_gpio_input(gpio);
  65. }
  66. int gpio_set_value(unsigned gpio, int value)
  67. {
  68. return sunxi_gpio_output(gpio, value);
  69. }
  70. int sunxi_name_to_gpio(const char *name)
  71. {
  72. int group = 0;
  73. int groupsize = 9 * 32;
  74. long pin;
  75. char *eptr;
  76. if (*name == 'P' || *name == 'p')
  77. name++;
  78. if (*name >= 'A') {
  79. group = *name - (*name > 'a' ? 'a' : 'A');
  80. groupsize = 32;
  81. name++;
  82. }
  83. pin = simple_strtol(name, &eptr, 10);
  84. if (!*name || *eptr)
  85. return -1;
  86. if (pin < 0 || pin > groupsize || group >= 9)
  87. return -1;
  88. return group * 32 + pin;
  89. }
  90. #endif /* DM_GPIO */
  91. #if CONFIG_IS_ENABLED(DM_GPIO)
  92. /* TODO(sjg@chromium.org): Remove this function and use device tree */
  93. int sunxi_name_to_gpio(const char *name)
  94. {
  95. unsigned int gpio;
  96. int ret;
  97. #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
  98. char lookup[8];
  99. if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
  100. sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
  101. SUNXI_GPIO_AXP0_VBUS_ENABLE);
  102. name = lookup;
  103. }
  104. #endif
  105. ret = gpio_lookup_name(name, NULL, NULL, &gpio);
  106. return ret ? ret : gpio;
  107. }
  108. static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
  109. {
  110. struct sunxi_gpio_plat *plat = dev_get_plat(dev);
  111. u32 num = GPIO_NUM(offset);
  112. unsigned dat;
  113. dat = readl(&plat->regs->dat);
  114. dat >>= num;
  115. return dat & 0x1;
  116. }
  117. static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
  118. {
  119. struct sunxi_gpio_plat *plat = dev_get_plat(dev);
  120. int func;
  121. func = sunxi_gpio_get_cfgbank(plat->regs, offset);
  122. if (func == SUNXI_GPIO_OUTPUT)
  123. return GPIOF_OUTPUT;
  124. else if (func == SUNXI_GPIO_INPUT)
  125. return GPIOF_INPUT;
  126. else
  127. return GPIOF_FUNC;
  128. }
  129. static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
  130. struct ofnode_phandle_args *args)
  131. {
  132. int ret;
  133. ret = device_get_child(dev, args->args[0], &desc->dev);
  134. if (ret)
  135. return ret;
  136. desc->offset = args->args[1];
  137. desc->flags = gpio_flags_xlate(args->args[2]);
  138. return 0;
  139. }
  140. static int sunxi_gpio_set_flags(struct udevice *dev, unsigned int offset,
  141. ulong flags)
  142. {
  143. struct sunxi_gpio_plat *plat = dev_get_plat(dev);
  144. if (flags & GPIOD_IS_OUT) {
  145. u32 value = !!(flags & GPIOD_IS_OUT_ACTIVE);
  146. u32 num = GPIO_NUM(offset);
  147. clrsetbits_le32(&plat->regs->dat, 1 << num, value << num);
  148. sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
  149. } else if (flags & GPIOD_IS_IN) {
  150. u32 pull = 0;
  151. if (flags & GPIOD_PULL_UP)
  152. pull = 1;
  153. else if (flags & GPIOD_PULL_DOWN)
  154. pull = 2;
  155. sunxi_gpio_set_pull_bank(plat->regs, offset, pull);
  156. sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
  157. }
  158. return 0;
  159. }
  160. static const struct dm_gpio_ops gpio_sunxi_ops = {
  161. .get_value = sunxi_gpio_get_value,
  162. .get_function = sunxi_gpio_get_function,
  163. .xlate = sunxi_gpio_xlate,
  164. .set_flags = sunxi_gpio_set_flags,
  165. };
  166. static int gpio_sunxi_probe(struct udevice *dev)
  167. {
  168. struct sunxi_gpio_plat *plat = dev_get_plat(dev);
  169. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  170. /* Tell the uclass how many GPIOs we have */
  171. if (plat) {
  172. uc_priv->gpio_count = SUNXI_GPIOS_PER_BANK;
  173. uc_priv->bank_name = plat->bank_name;
  174. }
  175. return 0;
  176. }
  177. U_BOOT_DRIVER(gpio_sunxi) = {
  178. .name = "gpio_sunxi",
  179. .id = UCLASS_GPIO,
  180. .probe = gpio_sunxi_probe,
  181. .ops = &gpio_sunxi_ops,
  182. };
  183. #endif /* DM_GPIO */