fsl_portals.c 8.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2008-2011 Freescale Semiconductor, Inc.
  4. * Copyright 2017 NXP
  5. */
  6. #include <common.h>
  7. #include <log.h>
  8. #include <linux/libfdt.h>
  9. #include <fdt_support.h>
  10. #include <asm/processor.h>
  11. #include <asm/io.h>
  12. #ifdef CONFIG_PPC
  13. #include <asm/fsl_portals.h>
  14. #include <asm/fsl_liodn.h>
  15. #else
  16. #include <asm/arch-fsl-layerscape/fsl_portals.h>
  17. #include <asm/arch-fsl-layerscape/fsl_icid.h>
  18. #endif
  19. #include <fsl_qbman.h>
  20. #define MAX_BPORTALS (CFG_SYS_BMAN_CINH_SIZE / CFG_SYS_BMAN_SP_CINH_SIZE)
  21. #define MAX_QPORTALS (CFG_SYS_QMAN_CINH_SIZE / CFG_SYS_QMAN_SP_CINH_SIZE)
  22. void setup_qbman_portals(void)
  23. {
  24. void __iomem *bpaddr = (void *)CFG_SYS_BMAN_CINH_BASE +
  25. CFG_SYS_BMAN_SWP_ISDR_REG;
  26. void __iomem *qpaddr = (void *)CFG_SYS_QMAN_CINH_BASE +
  27. CFG_SYS_QMAN_SWP_ISDR_REG;
  28. struct ccsr_qman *qman = (void *)CFG_SYS_FSL_QMAN_ADDR;
  29. /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
  30. #ifdef CONFIG_PHYS_64BIT
  31. out_be32(&qman->qcsp_bare, (u32)(CFG_SYS_QMAN_MEM_PHYS >> 32));
  32. #endif
  33. out_be32(&qman->qcsp_bar, (u32)CFG_SYS_QMAN_MEM_PHYS);
  34. #ifdef CONFIG_FSL_CORENET
  35. int i;
  36. for (i = 0; i < CFG_SYS_QMAN_NUM_PORTALS; i++) {
  37. u8 sdest = qp_info[i].sdest;
  38. u16 fliodn = qp_info[i].fliodn;
  39. u16 dliodn = qp_info[i].dliodn;
  40. u16 liodn_off = qp_info[i].liodn_offset;
  41. out_be32(&qman->qcsp[i].qcsp_lio_cfg, (liodn_off << 16) |
  42. dliodn);
  43. /* set frame liodn */
  44. out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn);
  45. }
  46. #else
  47. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  48. int i;
  49. for (i = 0; i < CFG_SYS_QMAN_NUM_PORTALS; i++) {
  50. u8 sdest = qp_info[i].sdest;
  51. u16 ficid = qp_info[i].ficid;
  52. u16 dicid = qp_info[i].dicid;
  53. u16 icid = qp_info[i].icid;
  54. out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) |
  55. dicid);
  56. /* set frame icid */
  57. out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid);
  58. }
  59. #endif
  60. #endif
  61. /* Change default state of BMan ISDR portals to all 1s */
  62. inhibit_portals(bpaddr, CFG_SYS_BMAN_NUM_PORTALS, MAX_BPORTALS,
  63. CFG_SYS_BMAN_SP_CINH_SIZE);
  64. inhibit_portals(qpaddr, CFG_SYS_QMAN_NUM_PORTALS, MAX_QPORTALS,
  65. CFG_SYS_QMAN_SP_CINH_SIZE);
  66. }
  67. void inhibit_portals(void __iomem *addr, int max_portals,
  68. int arch_max_portals, int portal_cinh_size)
  69. {
  70. u32 val;
  71. int i;
  72. /* arch_max_portals is the maximum based on memory size. This includes
  73. * the reserved memory in the SoC. max_portals the number of physical
  74. * portals in the SoC
  75. */
  76. if (max_portals > arch_max_portals) {
  77. printf("ERROR: portal config error\n");
  78. max_portals = arch_max_portals;
  79. }
  80. for (i = 0; i < max_portals; i++) {
  81. out_be32(addr, -1);
  82. val = in_be32(addr);
  83. if (!val) {
  84. printf("ERROR: Stopped after %d portals\n", i);
  85. return;
  86. }
  87. addr += portal_cinh_size;
  88. }
  89. debug("Cleared %d portals\n", i);
  90. }
  91. #ifdef CONFIG_PPC
  92. static int fdt_qportal(void *blob, int off, int id, char *name,
  93. enum fsl_dpaa_dev dev, int create)
  94. {
  95. int childoff, dev_off, ret = 0;
  96. unsigned int dev_handle;
  97. #ifdef CONFIG_FSL_CORENET
  98. int num;
  99. u32 liodns[2];
  100. #endif
  101. childoff = fdt_subnode_offset(blob, off, name);
  102. if (create) {
  103. char handle[64], *p;
  104. strncpy(handle, name, sizeof(handle));
  105. p = strchr(handle, '@');
  106. if (!strncmp(name, "fman", 4)) {
  107. *p = *(p + 1);
  108. p++;
  109. }
  110. *p = '\0';
  111. dev_off = fdt_path_offset(blob, handle);
  112. /* skip this node if alias is not found */
  113. if (dev_off == -FDT_ERR_BADPATH)
  114. return 0;
  115. if (dev_off < 0)
  116. return dev_off;
  117. if (childoff <= 0)
  118. childoff = fdt_add_subnode(blob, off, name);
  119. /* need to update the dev_off after adding a subnode */
  120. dev_off = fdt_path_offset(blob, handle);
  121. if (dev_off < 0)
  122. return dev_off;
  123. if (childoff > 0) {
  124. dev_handle = fdt_get_phandle(blob, dev_off);
  125. if (dev_handle <= 0) {
  126. dev_handle = fdt_create_phandle(blob, dev_off);
  127. if (!dev_handle)
  128. return -FDT_ERR_NOPHANDLES;
  129. }
  130. ret = fdt_setprop(blob, childoff, "dev-handle",
  131. &dev_handle, sizeof(dev_handle));
  132. if (ret < 0)
  133. return ret;
  134. #ifdef CONFIG_FSL_CORENET
  135. num = get_dpaa_liodn(dev, &liodns[0], id);
  136. ret = fdt_setprop(blob, childoff, "fsl,liodn",
  137. &liodns[0], sizeof(u32) * num);
  138. if (!strncmp(name, "pme", 3)) {
  139. u32 pme_rev1, pme_rev2;
  140. ccsr_pme_t *pme_regs =
  141. (void *)CFG_SYS_FSL_CORENET_PME_ADDR;
  142. pme_rev1 = in_be32(&pme_regs->pm_ip_rev_1);
  143. pme_rev2 = in_be32(&pme_regs->pm_ip_rev_2);
  144. ret = fdt_setprop(blob, childoff,
  145. "fsl,pme-rev1", &pme_rev1,
  146. sizeof(u32));
  147. if (ret < 0)
  148. return ret;
  149. ret = fdt_setprop(blob, childoff,
  150. "fsl,pme-rev2", &pme_rev2,
  151. sizeof(u32));
  152. }
  153. #endif
  154. } else {
  155. return childoff;
  156. }
  157. } else {
  158. if (childoff > 0)
  159. ret = fdt_del_node(blob, childoff);
  160. }
  161. return ret;
  162. }
  163. #endif /* CONFIG_PPC */
  164. void fdt_fixup_qportals(void *blob)
  165. {
  166. int off, err;
  167. unsigned int maj, min;
  168. unsigned int ip_cfg;
  169. struct ccsr_qman *qman = (void *)CFG_SYS_FSL_QMAN_ADDR;
  170. u32 rev_1 = in_be32(&qman->ip_rev_1);
  171. u32 rev_2 = in_be32(&qman->ip_rev_2);
  172. char compat[64];
  173. int compat_len;
  174. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  175. int smmu_ph = fdt_get_smmu_phandle(blob);
  176. #endif
  177. maj = (rev_1 >> 8) & 0xff;
  178. min = rev_1 & 0xff;
  179. ip_cfg = rev_2 & 0xff;
  180. compat_len = sprintf(compat, "fsl,qman-portal-%u.%u.%u",
  181. maj, min, ip_cfg) + 1;
  182. compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
  183. fdt_for_each_node_by_compatible(off, blob, -1, "fsl,qman-portal") {
  184. #if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1043A) || \
  185. defined(CONFIG_ARCH_LS1046A)
  186. #ifdef CONFIG_FSL_CORENET
  187. u32 liodns[2];
  188. #endif
  189. const int *ci = fdt_getprop(blob, off, "cell-index", &err);
  190. int i;
  191. if (!ci)
  192. goto err;
  193. i = fdt32_to_cpu(*ci);
  194. #if defined(CONFIG_SYS_DPAA_FMAN) && defined(CONFIG_PPC)
  195. int j;
  196. #endif
  197. #endif /* CONFIG_PPC || CONFIG_ARCH_LS1043A || CONFIG_ARCH_LS1046A */
  198. err = fdt_setprop(blob, off, "compatible", compat, compat_len);
  199. if (err < 0)
  200. goto err;
  201. #ifdef CONFIG_PPC
  202. #ifdef CONFIG_FSL_CORENET
  203. liodns[0] = qp_info[i].dliodn;
  204. liodns[1] = qp_info[i].fliodn;
  205. err = fdt_setprop(blob, off, "fsl,liodn",
  206. &liodns, sizeof(u32) * 2);
  207. if (err < 0)
  208. goto err;
  209. #endif
  210. i++;
  211. err = fdt_qportal(blob, off, i, "crypto@0", FSL_HW_PORTAL_SEC,
  212. IS_E_PROCESSOR(get_svr()));
  213. if (err < 0)
  214. goto err;
  215. #ifdef CONFIG_FSL_CORENET
  216. #ifdef CONFIG_SYS_DPAA_PME
  217. err = fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 1);
  218. if (err < 0)
  219. goto err;
  220. #else
  221. fdt_qportal(blob, off, i, "pme@0", FSL_HW_PORTAL_PME, 0);
  222. #endif
  223. #endif
  224. #ifdef CONFIG_SYS_DPAA_FMAN
  225. for (j = 0; j < CFG_SYS_NUM_FMAN; j++) {
  226. char name[] = "fman@0";
  227. name[sizeof(name) - 2] = '0' + j;
  228. err = fdt_qportal(blob, off, i, name,
  229. FSL_HW_PORTAL_FMAN1 + j, 1);
  230. if (err < 0)
  231. goto err;
  232. }
  233. #endif
  234. #ifdef CONFIG_SYS_DPAA_RMAN
  235. err = fdt_qportal(blob, off, i, "rman@0",
  236. FSL_HW_PORTAL_RMAN, 1);
  237. if (err < 0)
  238. goto err;
  239. #endif
  240. #else
  241. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  242. if (smmu_ph >= 0) {
  243. u32 icids[3];
  244. icids[0] = qp_info[i].icid;
  245. icids[1] = qp_info[i].dicid;
  246. icids[2] = qp_info[i].ficid;
  247. fdt_set_iommu_prop(blob, off, smmu_ph, icids, 3);
  248. }
  249. #endif
  250. #endif /* CONFIG_PPC */
  251. err:
  252. if (err < 0) {
  253. printf("ERROR: unable to create props for %s: %s\n",
  254. fdt_get_name(blob, off, NULL),
  255. fdt_strerror(err));
  256. return;
  257. }
  258. }
  259. }
  260. void fdt_fixup_bportals(void *blob)
  261. {
  262. int off, err;
  263. unsigned int maj, min;
  264. unsigned int ip_cfg;
  265. struct ccsr_bman *bman = (void *)CFG_SYS_FSL_BMAN_ADDR;
  266. u32 rev_1 = in_be32(&bman->ip_rev_1);
  267. u32 rev_2 = in_be32(&bman->ip_rev_2);
  268. char compat[64];
  269. int compat_len;
  270. maj = (rev_1 >> 8) & 0xff;
  271. min = rev_1 & 0xff;
  272. ip_cfg = rev_2 & 0xff;
  273. compat_len = sprintf(compat, "fsl,bman-portal-%u.%u.%u",
  274. maj, min, ip_cfg) + 1;
  275. compat_len += sprintf(compat + compat_len, "fsl,bman-portal") + 1;
  276. off = fdt_node_offset_by_compatible(blob, -1, "fsl,bman-portal");
  277. while (off != -FDT_ERR_NOTFOUND) {
  278. err = fdt_setprop(blob, off, "compatible", compat, compat_len);
  279. if (err < 0) {
  280. printf("ERROR: unable to create props for %s: %s\n",
  281. fdt_get_name(blob, off, NULL),
  282. fdt_strerror(err));
  283. return;
  284. }
  285. off = fdt_node_offset_by_compatible(blob, off,
  286. "fsl,bman-portal");
  287. }
  288. }