ls2_sfp.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
  4. *
  5. * This driver supports the Security Fuse Processor device found on some
  6. * Layerscape processors. At the moment, we only support a few processors.
  7. * This driver was written with reference to the Layerscape SDK User
  8. * Guide [1] and the ATF SFP driver [2].
  9. *
  10. * [1] https://docs.nxp.com/bundle/GUID-487B2E69-BB19-42CB-AC38-7EF18C0FE3AE/page/GUID-27FC40AD-3321-4A82-B29E-7BB49EE94F23.html
  11. * [2] https://source.codeaurora.org/external/qoriq/qoriq-components/atf/tree/drivers/nxp/sfp?h=github.com/master
  12. */
  13. #define LOG_CATEGORY UCLASS_MISC
  14. #include <common.h>
  15. #include <clk.h>
  16. #include <fuse.h>
  17. #include <misc.h>
  18. #include <asm/io.h>
  19. #include <dm/device_compat.h>
  20. #include <dm/read.h>
  21. #include <linux/bitfield.h>
  22. #include <power/regulator.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. #define SFP_INGR 0x20
  25. #define SFP_SVHESR 0x24
  26. #define SFP_SFPCR 0x28
  27. #define SFP_START 0x200
  28. #define SFP_END 0x284
  29. #define SFP_SIZE (SFP_END - SFP_START + 4)
  30. #define SFP_INGR_ERR BIT(8)
  31. #define SFP_INGR_INST GENMASK(7, 0)
  32. #define SFP_INGR_READFB 0x01
  33. #define SFP_INGR_PROGFB 0x02
  34. #define SFP_SFPCR_PPW GENMASK(15, 0)
  35. enum ls2_sfp_ioctl {
  36. LS2_SFP_IOCTL_READ,
  37. LS2_SFP_IOCTL_PROG,
  38. };
  39. /**
  40. * struct ls2_sfp_priv - private data for LS2 SFP
  41. * @base: Base address of SFP
  42. * @supply: The (optional) supply for TA_PROG_SFP
  43. * @programmed: Whether we've already programmed the fuses since the last
  44. * reset. The SFP has a *very* limited amount of programming
  45. * cycles (two to six, depending on the model), so we try and
  46. * prevent accidentally performing additional programming
  47. * cycles.
  48. * @dirty: Whether the mirror registers have been written to (overridden)
  49. * since we've last read the fuses (either as part of the reset
  50. * process or using a READFB instruction). There is a much larger,
  51. * but still finite, limit on the number of SFP read cycles (around
  52. * 300,000), so we try and minimize reads as well.
  53. */
  54. struct ls2_sfp_priv {
  55. void __iomem *base;
  56. struct udevice *supply;
  57. bool programmed, dirty;
  58. };
  59. static u32 ls2_sfp_readl(struct ls2_sfp_priv *priv, ulong off)
  60. {
  61. u32 val = be32_to_cpu(readl(priv->base + off));
  62. log_debug("%08x = readl(%p)\n", val, priv->base + off);
  63. return val;
  64. }
  65. static void ls2_sfp_writel(struct ls2_sfp_priv *priv, ulong val, ulong off)
  66. {
  67. log_debug("writel(%08lx, %p)\n", val, priv->base + off);
  68. writel(cpu_to_be32(val), priv->base + off);
  69. }
  70. static bool ls2_sfp_validate(struct udevice *dev, int offset, int size)
  71. {
  72. if (offset < 0 || size < 0) {
  73. dev_notice(dev, "size and offset must be positive\n");
  74. return false;
  75. }
  76. if (offset & 3 || size & 3) {
  77. dev_notice(dev, "size and offset must be multiples of 4\n");
  78. return false;
  79. }
  80. if (offset + size > SFP_SIZE) {
  81. dev_notice(dev, "size + offset must be <= %#x\n", SFP_SIZE);
  82. return false;
  83. }
  84. return true;
  85. }
  86. static int ls2_sfp_read(struct udevice *dev, int offset, void *buf_bytes,
  87. int size)
  88. {
  89. int i;
  90. struct ls2_sfp_priv *priv = dev_get_priv(dev);
  91. u32 *buf = buf_bytes;
  92. if (!ls2_sfp_validate(dev, offset, size))
  93. return -EINVAL;
  94. for (i = 0; i < size; i += 4)
  95. buf[i >> 2] = ls2_sfp_readl(priv, SFP_START + offset + i);
  96. return size;
  97. }
  98. static int ls2_sfp_write(struct udevice *dev, int offset,
  99. const void *buf_bytes, int size)
  100. {
  101. int i;
  102. struct ls2_sfp_priv *priv = dev_get_priv(dev);
  103. const u32 *buf = buf_bytes;
  104. if (!ls2_sfp_validate(dev, offset, size))
  105. return -EINVAL;
  106. for (i = 0; i < size; i += 4)
  107. ls2_sfp_writel(priv, buf[i >> 2], SFP_START + offset + i);
  108. priv->dirty = true;
  109. return size;
  110. }
  111. static int ls2_sfp_check_secret(struct udevice *dev)
  112. {
  113. struct ls2_sfp_priv *priv = dev_get_priv(dev);
  114. u32 svhesr = ls2_sfp_readl(priv, SFP_SVHESR);
  115. if (svhesr) {
  116. dev_warn(dev, "secret value hamming error not zero: %08x\n",
  117. svhesr);
  118. return -EIO;
  119. }
  120. return 0;
  121. }
  122. static int ls2_sfp_transaction(struct ls2_sfp_priv *priv, ulong inst)
  123. {
  124. u32 ingr;
  125. ls2_sfp_writel(priv, inst, SFP_INGR);
  126. do {
  127. ingr = ls2_sfp_readl(priv, SFP_INGR);
  128. } while (FIELD_GET(SFP_INGR_INST, ingr));
  129. return FIELD_GET(SFP_INGR_ERR, ingr) ? -EIO : 0;
  130. }
  131. static int ls2_sfp_ioctl(struct udevice *dev, unsigned long request, void *buf)
  132. {
  133. int ret;
  134. struct ls2_sfp_priv *priv = dev_get_priv(dev);
  135. switch (request) {
  136. case LS2_SFP_IOCTL_READ:
  137. if (!priv->dirty) {
  138. dev_dbg(dev, "ignoring read request, since fuses are not dirty\n");
  139. return 0;
  140. }
  141. ret = ls2_sfp_transaction(priv, SFP_INGR_READFB);
  142. if (ret) {
  143. dev_err(dev, "error reading fuses\n");
  144. return ret;
  145. }
  146. ls2_sfp_check_secret(dev);
  147. priv->dirty = false;
  148. return 0;
  149. case LS2_SFP_IOCTL_PROG:
  150. if (priv->programmed) {
  151. dev_warn(dev, "fuses already programmed\n");
  152. return -EPERM;
  153. }
  154. ret = ls2_sfp_check_secret(dev);
  155. if (ret)
  156. return ret;
  157. if (priv->supply) {
  158. ret = regulator_set_enable(priv->supply, true);
  159. if (ret)
  160. return ret;
  161. }
  162. ret = ls2_sfp_transaction(priv, SFP_INGR_PROGFB);
  163. priv->programmed = true;
  164. if (priv->supply)
  165. regulator_set_enable(priv->supply, false);
  166. if (ret)
  167. dev_err(dev, "error programming fuses\n");
  168. return ret;
  169. default:
  170. dev_dbg(dev, "unknown ioctl %lu\n", request);
  171. return -EINVAL;
  172. }
  173. }
  174. static const struct misc_ops ls2_sfp_ops = {
  175. .read = ls2_sfp_read,
  176. .write = ls2_sfp_write,
  177. .ioctl = ls2_sfp_ioctl,
  178. };
  179. static int ls2_sfp_probe(struct udevice *dev)
  180. {
  181. int ret;
  182. struct clk clk;
  183. struct ls2_sfp_priv *priv = dev_get_priv(dev);
  184. ulong rate;
  185. priv->base = dev_read_addr_ptr(dev);
  186. if (!priv->base) {
  187. dev_dbg(dev, "could not read register base\n");
  188. return -EINVAL;
  189. }
  190. ret = device_get_supply_regulator(dev, "ta-sfp-prog-supply", &priv->supply);
  191. if (ret && ret != -ENODEV && ret != -ENOSYS) {
  192. dev_dbg(dev, "problem getting supply (err %d)\n", ret);
  193. return ret;
  194. }
  195. ret = clk_get_by_name(dev, "sfp", &clk);
  196. if (ret == -ENOSYS) {
  197. rate = gd->bus_clk / 4;
  198. } else if (ret) {
  199. dev_dbg(dev, "could not get clock (err %d)\n", ret);
  200. return ret;
  201. } else {
  202. ret = clk_enable(&clk);
  203. if (ret) {
  204. dev_dbg(dev, "could not enable clock (err %d)\n", ret);
  205. return ret;
  206. }
  207. rate = clk_get_rate(&clk);
  208. clk_free(&clk);
  209. if (!rate || IS_ERR_VALUE(rate)) {
  210. ret = rate ? rate : -ENOENT;
  211. dev_dbg(dev, "could not get clock rate (err %d)\n",
  212. ret);
  213. return ret;
  214. }
  215. }
  216. /* sfp clock in MHz * 12 */
  217. ls2_sfp_writel(priv, FIELD_PREP(SFP_SFPCR_PPW, rate * 12 / 1000000),
  218. SFP_SFPCR);
  219. ls2_sfp_check_secret(dev);
  220. return 0;
  221. }
  222. static const struct udevice_id ls2_sfp_ids[] = {
  223. { .compatible = "fsl,ls1021a-sfp" },
  224. { }
  225. };
  226. U_BOOT_DRIVER(ls2_sfp) = {
  227. .name = "ls2_sfp",
  228. .id = UCLASS_MISC,
  229. .of_match = ls2_sfp_ids,
  230. .probe = ls2_sfp_probe,
  231. .ops = &ls2_sfp_ops,
  232. .priv_auto = sizeof(struct ls2_sfp_priv),
  233. };
  234. static int ls2_sfp_device(struct udevice **dev)
  235. {
  236. int ret = uclass_get_device_by_driver(UCLASS_MISC,
  237. DM_DRIVER_GET(ls2_sfp), dev);
  238. if (ret)
  239. log_debug("device not found (err %d)\n", ret);
  240. return ret;
  241. }
  242. int fuse_read(u32 bank, u32 word, u32 *val)
  243. {
  244. int ret;
  245. struct udevice *dev;
  246. ret = ls2_sfp_device(&dev);
  247. if (ret)
  248. return ret;
  249. ret = misc_ioctl(dev, LS2_SFP_IOCTL_READ, NULL);
  250. if (ret)
  251. return ret;
  252. ret = misc_read(dev, word << 2, val, sizeof(*val));
  253. return ret < 0 ? ret : 0;
  254. }
  255. int fuse_sense(u32 bank, u32 word, u32 *val)
  256. {
  257. int ret;
  258. struct udevice *dev;
  259. ret = ls2_sfp_device(&dev);
  260. if (ret)
  261. return ret;
  262. ret = misc_read(dev, word << 2, val, sizeof(*val));
  263. return ret < 0 ? ret : 0;
  264. }
  265. int fuse_prog(u32 bank, u32 word, u32 val)
  266. {
  267. int ret;
  268. struct udevice *dev;
  269. ret = ls2_sfp_device(&dev);
  270. if (ret)
  271. return ret;
  272. ret = misc_write(dev, word << 2, &val, sizeof(val));
  273. if (ret < 0)
  274. return ret;
  275. return misc_ioctl(dev, LS2_SFP_IOCTL_PROG, NULL);
  276. }
  277. int fuse_override(u32 bank, u32 word, u32 val)
  278. {
  279. int ret;
  280. struct udevice *dev;
  281. ret = ls2_sfp_device(&dev);
  282. if (ret)
  283. return ret;
  284. ret = misc_write(dev, word << 2, &val, sizeof(val));
  285. return ret < 0 ? ret : 0;
  286. }