f_sdh30.c 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Socionext F_SDH30 eMMC driver
  4. * Copyright 2021 Linaro Ltd.
  5. * Copyright 2021 Socionext, Inc.
  6. */
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <malloc.h>
  11. #include <sdhci.h>
  12. #define F_SDH30_ESD_CONTROL 0x124
  13. #define F_SDH30_CMD_DAT_DELAY BIT(9)
  14. #define F_SDH30_TEST 0x158
  15. #define F_SDH30_FORCE_CARD_INSERT BIT(6)
  16. struct f_sdh30_data {
  17. void (*init)(struct udevice *dev);
  18. u32 quirks;
  19. };
  20. struct f_sdh30_plat {
  21. struct mmc_config cfg;
  22. struct mmc mmc;
  23. bool enable_cmd_dat_delay;
  24. const struct f_sdh30_data *data;
  25. };
  26. DECLARE_GLOBAL_DATA_PTR;
  27. static void f_sdh30_e51_init(struct udevice *dev)
  28. {
  29. struct f_sdh30_plat *plat = dev_get_plat(dev);
  30. struct sdhci_host *host = dev_get_priv(dev);
  31. u32 val;
  32. val = sdhci_readl(host, F_SDH30_ESD_CONTROL);
  33. if (plat->enable_cmd_dat_delay)
  34. val |= F_SDH30_CMD_DAT_DELAY;
  35. else
  36. val &= ~F_SDH30_CMD_DAT_DELAY;
  37. sdhci_writel(host, val, F_SDH30_ESD_CONTROL);
  38. val = sdhci_readl(host, F_SDH30_TEST);
  39. if (plat->cfg.host_caps & MMC_CAP_NONREMOVABLE)
  40. val |= F_SDH30_FORCE_CARD_INSERT;
  41. else
  42. val &= ~F_SDH30_FORCE_CARD_INSERT;
  43. sdhci_writel(host, val, F_SDH30_TEST);
  44. }
  45. static int f_sdh30_sdhci_probe(struct udevice *dev)
  46. {
  47. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  48. struct f_sdh30_plat *plat = dev_get_plat(dev);
  49. struct sdhci_host *host = dev_get_priv(dev);
  50. int ret;
  51. plat->data = (const struct f_sdh30_data *)dev_get_driver_data(dev);
  52. ret = mmc_of_parse(dev, &plat->cfg);
  53. if (ret)
  54. return ret;
  55. host->mmc = &plat->mmc;
  56. host->mmc->dev = dev;
  57. host->mmc->priv = host;
  58. if (plat->data && plat->data->quirks)
  59. host->quirks = plat->data->quirks;
  60. ret = sdhci_setup_cfg(&plat->cfg, host, 200000000, 400000);
  61. if (ret)
  62. return ret;
  63. upriv->mmc = host->mmc;
  64. mmc_set_clock(host->mmc, host->mmc->cfg->f_min, MMC_CLK_ENABLE);
  65. ret = sdhci_probe(dev);
  66. if (ret)
  67. return ret;
  68. if (plat->data && plat->data->init)
  69. plat->data->init(dev);
  70. return 0;
  71. }
  72. static int f_sdh30_of_to_plat(struct udevice *dev)
  73. {
  74. struct sdhci_host *host = dev_get_priv(dev);
  75. struct f_sdh30_plat *plat = dev_get_plat(dev);
  76. host->name = strdup(dev->name);
  77. host->ioaddr = dev_read_addr_ptr(dev);
  78. host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
  79. host->index = dev_read_u32_default(dev, "index", 0);
  80. plat->enable_cmd_dat_delay =
  81. dev_read_bool(dev, "socionext,enable-cmd-dat-delay");
  82. return 0;
  83. }
  84. static int f_sdh30_bind(struct udevice *dev)
  85. {
  86. struct f_sdh30_plat *plat = dev_get_plat(dev);
  87. return sdhci_bind(dev, &plat->mmc, &plat->cfg);
  88. }
  89. static const struct f_sdh30_data f_sdh30_e51_data = {
  90. .init = f_sdh30_e51_init,
  91. .quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_SUPPORT_SINGLE,
  92. };
  93. static const struct udevice_id f_sdh30_mmc_ids[] = {
  94. {
  95. .compatible = "fujitsu,mb86s70-sdhci-3.0",
  96. },
  97. {
  98. .compatible = "socionext,f-sdh30-e51-mmc",
  99. .data = (ulong)&f_sdh30_e51_data,
  100. },
  101. { }
  102. };
  103. U_BOOT_DRIVER(f_sdh30_drv) = {
  104. .name = "f_sdh30_sdhci",
  105. .id = UCLASS_MMC,
  106. .of_match = f_sdh30_mmc_ids,
  107. .of_to_plat = f_sdh30_of_to_plat,
  108. .ops = &sdhci_ops,
  109. .bind = f_sdh30_bind,
  110. .probe = f_sdh30_sdhci_probe,
  111. .priv_auto = sizeof(struct sdhci_host),
  112. .plat_auto = sizeof(struct f_sdh30_plat),
  113. };