pci_rom.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2014 Google, Inc
  4. *
  5. * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
  6. *
  7. * Modifications are:
  8. * Copyright (C) 2003-2004 Linux Networx
  9. * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
  10. * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
  11. * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
  12. * Copyright (C) 2005-2006 Tyan
  13. * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
  14. * Copyright (C) 2005-2009 coresystems GmbH
  15. * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
  16. *
  17. * PCI Bus Services, see include/linux/pci.h for further explanation.
  18. *
  19. * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
  20. * David Mosberger-Tang
  21. *
  22. * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
  23. */
  24. #define LOG_CATEGORY UCLASS_PCI
  25. #include <common.h>
  26. #include <bios_emul.h>
  27. #include <bloblist.h>
  28. #include <bootstage.h>
  29. #include <dm.h>
  30. #include <errno.h>
  31. #include <init.h>
  32. #include <log.h>
  33. #include <malloc.h>
  34. #include <pci.h>
  35. #include <pci_rom.h>
  36. #include <spl.h>
  37. #include <vesa.h>
  38. #include <video.h>
  39. #include <acpi/acpi_s3.h>
  40. #include <asm/global_data.h>
  41. #include <linux/screen_info.h>
  42. DECLARE_GLOBAL_DATA_PTR;
  43. __weak bool board_should_run_oprom(struct udevice *dev)
  44. {
  45. #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
  46. if (gd->arch.prev_sleep_state == ACPI_S3) {
  47. if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
  48. return true;
  49. else
  50. return false;
  51. }
  52. #endif
  53. return true;
  54. }
  55. __weak bool board_should_load_oprom(struct udevice *dev)
  56. {
  57. return true;
  58. }
  59. __weak uint32_t board_map_oprom_vendev(uint32_t vendev)
  60. {
  61. return vendev;
  62. }
  63. static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
  64. {
  65. struct pci_child_plat *pplat = dev_get_parent_plat(dev);
  66. struct pci_rom_header *rom_header;
  67. struct pci_rom_data *rom_data;
  68. u16 rom_vendor, rom_device;
  69. u32 rom_class;
  70. u32 vendev;
  71. u32 mapped_vendev;
  72. u32 rom_address;
  73. vendev = pplat->vendor << 16 | pplat->device;
  74. mapped_vendev = board_map_oprom_vendev(vendev);
  75. if (vendev != mapped_vendev)
  76. debug("Device ID mapped to %#08x\n", mapped_vendev);
  77. #ifdef CONFIG_VGA_BIOS_ADDR
  78. rom_address = CONFIG_VGA_BIOS_ADDR;
  79. #else
  80. dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
  81. if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
  82. debug("%s: rom_address=%x\n", __func__, rom_address);
  83. return -ENOENT;
  84. }
  85. rom_address &= PCI_ROM_ADDRESS_MASK;
  86. /* Enable expansion ROM address decoding. */
  87. dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
  88. rom_address | PCI_ROM_ADDRESS_ENABLE);
  89. #endif
  90. debug("Option ROM address %x\n", rom_address);
  91. rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
  92. debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
  93. le16_to_cpu(rom_header->signature),
  94. rom_header->size * 512, le16_to_cpu(rom_header->data));
  95. if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
  96. printf("Incorrect expansion ROM header signature %04x\n",
  97. le16_to_cpu(rom_header->signature));
  98. #ifndef CONFIG_VGA_BIOS_ADDR
  99. /* Disable expansion ROM address decoding */
  100. dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
  101. #endif
  102. return -EINVAL;
  103. }
  104. rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
  105. rom_vendor = le16_to_cpu(rom_data->vendor);
  106. rom_device = le16_to_cpu(rom_data->device);
  107. debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
  108. rom_vendor, rom_device);
  109. /* If the device id is mapped, a mismatch is expected */
  110. if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
  111. (vendev == mapped_vendev)) {
  112. printf("ID mismatch: vendor ID %04x, device ID %04x\n",
  113. rom_vendor, rom_device);
  114. /* Continue anyway */
  115. }
  116. rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
  117. debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
  118. rom_class, rom_data->type);
  119. if (pplat->class != rom_class) {
  120. debug("Class Code mismatch ROM %06x, dev %06x\n",
  121. rom_class, pplat->class);
  122. }
  123. *hdrp = rom_header;
  124. return 0;
  125. }
  126. /**
  127. * pci_rom_load() - Load a ROM image and return a pointer to it
  128. *
  129. * @rom_header: Pointer to ROM image
  130. * @ram_headerp: Returns a pointer to the image in RAM
  131. * @allocedp: Returns true if @ram_headerp was allocated and needs
  132. * to be freed
  133. * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
  134. * the error state. Even if this function returns an error, it may have
  135. * allocated memory.
  136. */
  137. static int pci_rom_load(struct pci_rom_header *rom_header,
  138. struct pci_rom_header **ram_headerp, bool *allocedp)
  139. {
  140. struct pci_rom_data *rom_data;
  141. unsigned int rom_size;
  142. unsigned int image_size = 0;
  143. void *target;
  144. *allocedp = false;
  145. do {
  146. /* Get next image, until we see an x86 version */
  147. rom_header = (struct pci_rom_header *)((void *)rom_header +
  148. image_size);
  149. rom_data = (struct pci_rom_data *)((void *)rom_header +
  150. le16_to_cpu(rom_header->data));
  151. image_size = le16_to_cpu(rom_data->ilen) * 512;
  152. } while ((rom_data->type != 0) && (rom_data->indicator == 0));
  153. if (rom_data->type != 0)
  154. return -EACCES;
  155. rom_size = rom_header->size * 512;
  156. #ifdef PCI_VGA_RAM_IMAGE_START
  157. target = (void *)PCI_VGA_RAM_IMAGE_START;
  158. #else
  159. target = (void *)malloc(rom_size);
  160. if (!target)
  161. return -ENOMEM;
  162. *allocedp = true;
  163. #endif
  164. if (target != rom_header) {
  165. ulong start = get_timer(0);
  166. debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
  167. rom_header, target, rom_size);
  168. memcpy(target, rom_header, rom_size);
  169. if (memcmp(target, rom_header, rom_size)) {
  170. printf("VGA ROM copy failed\n");
  171. return -EFAULT;
  172. }
  173. debug("Copy took %lums\n", get_timer(start));
  174. }
  175. *ram_headerp = target;
  176. return 0;
  177. }
  178. struct vesa_state mode_info;
  179. void setup_video(struct screen_info *screen_info)
  180. {
  181. struct vesa_mode_info *vesa = &mode_info.vesa;
  182. /* Sanity test on VESA parameters */
  183. if (!vesa->x_resolution || !vesa->y_resolution)
  184. return;
  185. screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
  186. screen_info->lfb_width = vesa->x_resolution;
  187. screen_info->lfb_height = vesa->y_resolution;
  188. screen_info->lfb_depth = vesa->bits_per_pixel;
  189. screen_info->lfb_linelength = vesa->bytes_per_scanline;
  190. screen_info->lfb_base = vesa->phys_base_ptr;
  191. screen_info->lfb_size =
  192. ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
  193. 65536);
  194. screen_info->lfb_size >>= 16;
  195. screen_info->red_size = vesa->red_mask_size;
  196. screen_info->red_pos = vesa->red_mask_pos;
  197. screen_info->green_size = vesa->green_mask_size;
  198. screen_info->green_pos = vesa->green_mask_pos;
  199. screen_info->blue_size = vesa->blue_mask_size;
  200. screen_info->blue_pos = vesa->blue_mask_pos;
  201. screen_info->rsvd_size = vesa->reserved_mask_size;
  202. screen_info->rsvd_pos = vesa->reserved_mask_pos;
  203. }
  204. int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
  205. int exec_method)
  206. {
  207. struct pci_child_plat *pplat = dev_get_parent_plat(dev);
  208. struct pci_rom_header *rom = NULL, *ram = NULL;
  209. int vesa_mode = -1;
  210. bool emulate, alloced;
  211. int ret;
  212. /* Only execute VGA ROMs */
  213. if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
  214. debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
  215. PCI_CLASS_DISPLAY_VGA);
  216. return -ENODEV;
  217. }
  218. if (!board_should_load_oprom(dev))
  219. return log_msg_ret("Should not load OPROM", -ENXIO);
  220. ret = pci_rom_probe(dev, &rom);
  221. if (ret)
  222. return log_msg_ret("pro", ret);
  223. ret = pci_rom_load(rom, &ram, &alloced);
  224. if (ret) {
  225. ret = log_msg_ret("ld", ret);
  226. goto err;
  227. }
  228. if (!board_should_run_oprom(dev)) {
  229. ret = log_msg_ret("run", -ENXIO);
  230. goto err;
  231. }
  232. #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
  233. defined(CONFIG_FRAMEBUFFER_VESA_MODE)
  234. vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
  235. #endif
  236. debug("Selected vesa mode 0x%x\n", vesa_mode);
  237. if (exec_method & PCI_ROM_USE_NATIVE) {
  238. #ifdef CONFIG_X86
  239. emulate = false;
  240. #else
  241. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  242. printf("BIOS native execution is only available on x86\n");
  243. ret = -ENOSYS;
  244. goto err;
  245. }
  246. emulate = true;
  247. #endif
  248. } else {
  249. #ifdef CONFIG_BIOSEMU
  250. emulate = true;
  251. #else
  252. if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
  253. printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
  254. ret = -ENOSYS;
  255. goto err;
  256. }
  257. emulate = false;
  258. #endif
  259. }
  260. if (emulate) {
  261. if (CONFIG_IS_ENABLED(BIOSEMU)) {
  262. BE_VGAInfo *info;
  263. log_debug("Running video BIOS with emulator...");
  264. ret = biosemu_setup(dev, &info);
  265. if (ret)
  266. goto err;
  267. biosemu_set_interrupt_handler(0x15, int15_handler);
  268. ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
  269. true, vesa_mode, &mode_info);
  270. log_debug("done\n");
  271. if (ret)
  272. goto err;
  273. }
  274. } else {
  275. #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
  276. log_debug("Running video BIOS...");
  277. bios_set_interrupt_handler(0x15, int15_handler);
  278. bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
  279. &mode_info);
  280. log_debug("done\n");
  281. #endif
  282. }
  283. debug("Final vesa mode %x\n", mode_info.video_mode);
  284. ret = 0;
  285. err:
  286. if (alloced)
  287. free(ram);
  288. return ret;
  289. }
  290. int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
  291. struct video_priv *uc_priv,
  292. struct video_uc_plat *plat)
  293. {
  294. if (!vesa->x_resolution)
  295. return log_msg_ret("No x resolution", -ENXIO);
  296. uc_priv->xsize = vesa->x_resolution;
  297. uc_priv->ysize = vesa->y_resolution;
  298. uc_priv->line_length = vesa->bytes_per_scanline;
  299. switch (vesa->bits_per_pixel) {
  300. case 32:
  301. case 24:
  302. uc_priv->bpix = VIDEO_BPP32;
  303. break;
  304. case 16:
  305. uc_priv->bpix = VIDEO_BPP16;
  306. break;
  307. default:
  308. return -EPROTONOSUPPORT;
  309. }
  310. /* Use double buffering if enabled */
  311. if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
  312. plat->copy_base = fb;
  313. else
  314. plat->base = fb;
  315. log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
  316. plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
  317. return 0;
  318. }
  319. int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
  320. {
  321. struct video_uc_plat *plat = dev_get_uclass_plat(dev);
  322. struct video_priv *uc_priv = dev_get_uclass_priv(dev);
  323. int ret;
  324. /* If we are running from EFI or coreboot, this can't work */
  325. if (!ll_boot_init()) {
  326. printf("Not available (previous bootloader prevents it)\n");
  327. return -EPERM;
  328. }
  329. /* In U-Boot proper, collect the information added by SPL (see below) */
  330. if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
  331. CONFIG_IS_ENABLED(BLOBLIST)) {
  332. struct video_handoff *ho;
  333. ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
  334. if (!ho)
  335. return log_msg_ret("blf", -ENOENT);
  336. plat->base = ho->fb;
  337. plat->size = ho->size;
  338. uc_priv->xsize = ho->xsize;
  339. uc_priv->ysize = ho->ysize;
  340. uc_priv->line_length = ho->line_length;
  341. uc_priv->bpix = ho->bpix;
  342. } else {
  343. bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
  344. ret = dm_pci_run_vga_bios(dev, int15_handler,
  345. PCI_ROM_USE_NATIVE |
  346. PCI_ROM_ALLOW_FALLBACK);
  347. bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
  348. if (ret) {
  349. debug("failed to run video BIOS: %d\n", ret);
  350. return ret;
  351. }
  352. ret = vesa_setup_video_priv(&mode_info.vesa,
  353. mode_info.vesa.phys_base_ptr,
  354. uc_priv, plat);
  355. if (ret) {
  356. if (ret == -ENFILE) {
  357. /*
  358. * See video-uclass.c for how to set up reserved
  359. * memory in your video driver
  360. */
  361. log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
  362. dev->driver->name);
  363. }
  364. debug("No video mode configured\n");
  365. return ret;
  366. }
  367. }
  368. printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
  369. mode_info.vesa.bits_per_pixel);
  370. /* In SPL, store the information for use by U-Boot proper */
  371. if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
  372. struct video_handoff *ho;
  373. ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
  374. if (!ho)
  375. return log_msg_ret("blc", -ENOMEM);
  376. ho->fb = plat->base;
  377. ho->size = plat->size;
  378. ho->xsize = uc_priv->xsize;
  379. ho->ysize = uc_priv->ysize;
  380. ho->line_length = uc_priv->line_length;
  381. ho->bpix = uc_priv->bpix;
  382. }
  383. return 0;
  384. }