Kconfig 12 KB

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  1. #
  2. # PINCTRL infrastructure and drivers
  3. #
  4. menu "Pin controllers"
  5. config PINCTRL
  6. bool "Support pin controllers"
  7. depends on DM
  8. help
  9. This enables the basic support for pinctrl framework. You may want
  10. to enable some more options depending on what you want to do.
  11. config PINCTRL_FULL
  12. bool "Support full pin controllers"
  13. depends on PINCTRL && OF_CONTROL
  14. default y
  15. help
  16. This provides Linux-compatible device tree interface for the pinctrl
  17. subsystem. This feature depends on device tree configuration because
  18. it parses a device tree to look for the pinctrl device which the
  19. peripheral device is associated with.
  20. If this option is disabled (it is the only possible choice for non-DT
  21. boards), the pinctrl core provides no systematic mechanism for
  22. identifying peripheral devices, applying needed pinctrl settings.
  23. It is totally up to the implementation of each low-level driver.
  24. You can save memory footprint in return for some limitations.
  25. config PINCTRL_GENERIC
  26. bool "Support generic pin controllers"
  27. depends on PINCTRL_FULL
  28. default y
  29. help
  30. Say Y here if you want to use the pinctrl subsystem through the
  31. generic DT interface. If enabled, some functions become available
  32. to parse common properties such as "pins", "groups", "functions" and
  33. some pin configuration parameters. It would be easier if you only
  34. need the generic DT interface for pin muxing and pin configuration.
  35. If you need to handle vendor-specific DT properties, you can disable
  36. this option and implement your own set_state callback in the pinctrl
  37. operations.
  38. config PINMUX
  39. bool "Support pin multiplexing controllers"
  40. depends on PINCTRL_GENERIC
  41. default y
  42. help
  43. This option enables pin multiplexing through the generic pinctrl
  44. framework. Most SoCs have their own multiplexing arrangement where
  45. a single pin can be used for several functions. An SoC pinctrl driver
  46. allows the required function to be selected for each pin.
  47. The driver is typically controlled by the device tree.
  48. config PINCONF
  49. bool "Support pin configuration controllers"
  50. depends on PINCTRL_GENERIC
  51. help
  52. This option enables pin configuration through the generic pinctrl
  53. framework.
  54. config PINCONF_RECURSIVE
  55. bool "Support recursive binding for pin configuration nodes"
  56. depends on PINCTRL_FULL
  57. default n if ARCH_STM32MP
  58. default y
  59. help
  60. In the Linux pinctrl binding, the pin configuration nodes need not be
  61. direct children of the pin controller device (may be grandchildren for
  62. example). It is define is each individual pin controller device.
  63. Say Y here if you want to keep this behavior with the pinconfig
  64. u-class: all sub are recursively bounded.
  65. If the option is disabled, this behavior is deactivated and only
  66. the direct children of pin controller will be assumed as pin
  67. configuration; you can save memory footprint when this feature is
  68. no needed.
  69. config SPL_PINCTRL
  70. bool "Support pin controllers in SPL"
  71. depends on SPL && SPL_DM
  72. help
  73. This option is an SPL-variant of the PINCTRL option.
  74. See the help of PINCTRL for details.
  75. config TPL_PINCTRL
  76. bool "Support pin controllers in TPL"
  77. depends on TPL && TPL_DM
  78. help
  79. This option is an TPL variant of the PINCTRL option.
  80. See the help of PINCTRL for details.
  81. config VPL_PINCTRL
  82. bool "Support pin controllers in VPL"
  83. depends on VPL && VPL_DM
  84. help
  85. This option is an VPL variant of the PINCTRL option.
  86. See the help of PINCTRL for details.
  87. config SPL_PINCTRL_FULL
  88. bool "Support full pin controllers in SPL"
  89. depends on SPL_PINCTRL && SPL_OF_CONTROL
  90. default n if TARGET_STM32F746_DISCO
  91. default y
  92. help
  93. This option is an SPL variant of the PINCTRL_FULL option.
  94. See the help of PINCTRL_FULL for details.
  95. config TPL_PINCTRL_FULL
  96. bool "Support full pin controllers in TPL"
  97. depends on TPL_PINCTRL && TPL_OF_CONTROL
  98. help
  99. This option is a TPL variant of the PINCTRL_FULL option.
  100. See the help of PINCTRL_FULL for details.
  101. config VPL_PINCTRL_FULL
  102. bool "Support full pin controllers in VPL"
  103. depends on VPL_PINCTRL && VPL_OF_CONTROL
  104. help
  105. This option is a VPL variant of the PINCTRL_FULL option.
  106. See the help of PINCTRL_FULL for details.
  107. config SPL_PINCTRL_GENERIC
  108. bool "Support generic pin controllers in SPL"
  109. depends on SPL_PINCTRL_FULL
  110. default y
  111. help
  112. This option is an SPL-variant of the PINCTRL_GENERIC option.
  113. See the help of PINCTRL_GENERIC for details.
  114. config SPL_PINMUX
  115. bool "Support pin multiplexing controllers in SPL"
  116. depends on SPL_PINCTRL_GENERIC
  117. default y
  118. help
  119. This option is an SPL-variant of the PINMUX option.
  120. See the help of PINMUX for details.
  121. The pinctrl subsystem can add a substantial overhead to the SPL
  122. image since it typically requires quite a few tables either in the
  123. driver or in the device tree. If this is acceptable and you need
  124. to adjust pin multiplexing in SPL in order to boot into U-Boot,
  125. enable this option. You will need to enable device tree in SPL
  126. for this to work.
  127. config SPL_PINCONF
  128. bool "Support pin configuration controllers in SPL"
  129. depends on SPL_PINCTRL_GENERIC
  130. help
  131. This option is an SPL-variant of the PINCONF option.
  132. See the help of PINCONF for details.
  133. config SPL_PINCONF_RECURSIVE
  134. bool "Support recursive binding for pin configuration nodes in SPL"
  135. depends on SPL_PINCTRL_FULL
  136. default n if ARCH_STM32MP
  137. default y
  138. help
  139. This option is an SPL-variant of the PINCONF_RECURSIVE option.
  140. See the help of PINCONF_RECURSIVE for details.
  141. if PINCTRL || SPL_PINCTRL
  142. config PINCTRL_APPLE
  143. bool "Apple pinctrl driver"
  144. depends on DM && PINCTRL_GENERIC && ARCH_APPLE
  145. default y
  146. help
  147. Support pin multiplexing on Apple SoCs.
  148. The driver is controlled by a device tree node which contains
  149. both the GPIO definitions and pin control functions for each
  150. available multiplex function.
  151. config PINCTRL_AR933X
  152. bool "QCA/Athores ar933x pin control driver"
  153. depends on DM && SOC_AR933X
  154. help
  155. Support pin multiplexing control on QCA/Athores ar933x SoCs.
  156. The driver is controlled by a device tree node which contains
  157. both the GPIO definitions and pin control functions for each
  158. available multiplex function.
  159. config PINCTRL_AT91
  160. bool "AT91 pinctrl driver"
  161. depends on DM
  162. help
  163. This option is to enable the AT91 pinctrl driver for AT91 PIO
  164. controller.
  165. AT91 PIO controller is a combined gpio-controller, pin-mux and
  166. pin-config module. Each I/O pin may be dedicated as a general-purpose
  167. I/O or be assigned to a function of an embedded peripheral. Each I/O
  168. pin has a glitch filter providing rejection of glitches lower than
  169. one-half of peripheral clock cycle and a debouncing filter providing
  170. rejection of unwanted pulses from key or push button operations. You
  171. can also control the multi-driver capability, pull-up and pull-down
  172. feature on each I/O pin.
  173. config PINCTRL_AT91PIO4
  174. bool "AT91 PIO4 pinctrl driver"
  175. depends on DM
  176. help
  177. This option is to enable the AT91 pinctrl driver for AT91 PIO4
  178. controller which is available on SAMA5D2 SoC.
  179. config PINCTRL_INTEL
  180. bool "Standard Intel pin-control and pin-mux driver"
  181. help
  182. Recent Intel chips such as Apollo Lake (APL) use a common pin control
  183. and GPIO scheme. The settings for this come from an SoC-specific
  184. driver which must be separately enabled. The driver supports setting
  185. pins on start-up and changing the GPIO attributes.
  186. config PINCTRL_PIC32
  187. bool "Microchip PIC32 pin-control and pin-mux driver"
  188. depends on DM && MACH_PIC32
  189. default y
  190. help
  191. Supports individual pin selection and configuration for each
  192. remappable peripheral available on Microchip PIC32
  193. SoCs. This driver is controlled by a device tree node which
  194. contains both GPIO definition and pin control functions.
  195. config PINCTRL_QCA953X
  196. bool "QCA/Athores qca953x pin control driver"
  197. depends on DM && SOC_QCA953X
  198. help
  199. Support pin multiplexing control on QCA/Athores qca953x SoCs.
  200. The driver is controlled by a device tree node which contains both
  201. the GPIO definitions and pin control functions for each available
  202. multiplex function.
  203. config PINCTRL_QE
  204. bool "QE based pinctrl driver, like on mpc83xx"
  205. depends on DM
  206. help
  207. This option is to enable the QE pinctrl driver for QE based io
  208. controller.
  209. config PINCTRL_ROCKCHIP_RV1108
  210. bool "Rockchip rv1108 pin control driver"
  211. depends on DM
  212. help
  213. Support pin multiplexing control on Rockchip rv1108 SoC.
  214. The driver is controlled by a device tree node which contains
  215. both the GPIO definitions and pin control functions for each
  216. available multiplex function.
  217. config PINCTRL_SANDBOX
  218. bool "Sandbox pinctrl driver"
  219. depends on SANDBOX
  220. help
  221. This enables pinctrl driver for sandbox.
  222. Currently, this driver actually does nothing but print debug
  223. messages when pinctrl operations are invoked.
  224. config PINCTRL_SINGLE
  225. bool "Single register pin-control and pin-multiplex driver"
  226. depends on DM
  227. help
  228. This enables pinctrl driver for systems using a single register for
  229. pin configuration and multiplexing. TI's AM335X SoCs are examples of
  230. such systems.
  231. Depending on the platform make sure to also enable OF_TRANSLATE and
  232. eventually SPL_OF_TRANSLATE to get correct address translations.
  233. config PINCTRL_STI
  234. bool "STMicroelectronics STi pin-control and pin-mux driver"
  235. depends on DM && ARCH_STI
  236. default y
  237. help
  238. Support pin multiplexing control on STMicroelectronics STi SoCs.
  239. The driver is controlled by a device tree node which contains both
  240. the GPIO definitions and pin control functions for each available
  241. multiplex function.
  242. config PINCTRL_STM32
  243. bool "ST STM32 pin control driver"
  244. depends on DM
  245. help
  246. Supports pin multiplexing control on stm32 SoCs.
  247. The driver is controlled by a device tree node which contains both
  248. the GPIO definitions and pin control functions for each available
  249. multiplex function.
  250. config PINCTRL_STMFX
  251. bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
  252. depends on DM && PINCTRL_FULL
  253. help
  254. I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
  255. GPIO expander.
  256. Supports pin multiplexing control on stm32 SoCs.
  257. The driver is controlled by a device tree node which contains both
  258. the GPIO definitions and pin control functions for each available
  259. multiplex function.
  260. config SPL_PINCTRL_STMFX
  261. bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
  262. depends on SPL_PINCTRL_FULL
  263. help
  264. This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
  265. See the help of PINCTRL_STMFX for details.
  266. config ASPEED_AST2500_PINCTRL
  267. bool "Aspeed AST2500 pin control driver"
  268. depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
  269. default y
  270. help
  271. Support pin multiplexing control on Aspeed ast2500 SoC. The driver
  272. uses Generic Pinctrl framework and is compatible with the Linux
  273. driver, i.e. it uses the same device tree configuration.
  274. config ASPEED_AST2600_PINCTRL
  275. bool "Aspeed AST2600 pin control driver"
  276. depends on DM && PINCTRL_GENERIC && ASPEED_AST2600
  277. default y
  278. help
  279. Support pin multiplexing control on Aspeed ast2600 SoC. The driver
  280. uses Generic Pinctrl framework and is compatible with the Linux
  281. driver, i.e. it uses the same device tree configuration.
  282. config PINCTRL_K210
  283. bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
  284. depends on DM && PINCTRL_GENERIC
  285. help
  286. Support pin multiplexing on the K210. The "FPIOA" can remap any
  287. supported function to any multifunctional IO pin. It can also perform
  288. basic GPIO functions, such as reading the current value of a pin.
  289. config PINCTRL_ZYNQMP
  290. bool "Xilinx ZynqMP pin control driver"
  291. depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP
  292. default y
  293. help
  294. Support pin multiplexing control on Xilinx ZynqMP. The driver uses
  295. Generic Pinctrl framework and is compatible with the Linux driver,
  296. i.e. it uses the same device tree configuration.
  297. endif
  298. source "drivers/pinctrl/broadcom/Kconfig"
  299. source "drivers/pinctrl/exynos/Kconfig"
  300. source "drivers/pinctrl/intel/Kconfig"
  301. source "drivers/pinctrl/mediatek/Kconfig"
  302. source "drivers/pinctrl/meson/Kconfig"
  303. source "drivers/pinctrl/mscc/Kconfig"
  304. source "drivers/pinctrl/mtmips/Kconfig"
  305. source "drivers/pinctrl/mvebu/Kconfig"
  306. source "drivers/pinctrl/nexell/Kconfig"
  307. source "drivers/pinctrl/nuvoton/Kconfig"
  308. source "drivers/pinctrl/nxp/Kconfig"
  309. source "drivers/pinctrl/renesas/Kconfig"
  310. source "drivers/pinctrl/rockchip/Kconfig"
  311. source "drivers/pinctrl/sunxi/Kconfig"
  312. source "drivers/pinctrl/uniphier/Kconfig"
  313. source "drivers/pinctrl/starfive/Kconfig"
  314. endmenu