arm_twd_timer.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017-2022 Weidmüller Interface GmbH & Co. KG
  4. * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
  5. *
  6. * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
  7. * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
  8. *
  9. * (C) Copyright 2008
  10. * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  11. *
  12. * (C) Copyright 2004
  13. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  14. *
  15. * (C) Copyright 2002-2004
  16. * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  17. *
  18. * (C) Copyright 2003
  19. * Texas Instruments <www.ti.com>
  20. *
  21. * (C) Copyright 2002
  22. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  23. * Marius Groeger <mgroeger@sysgo.de>
  24. *
  25. * (C) Copyright 2002
  26. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  27. * Alex Zuepke <azu@sysgo.de>
  28. */
  29. #include <common.h>
  30. #include <dm.h>
  31. #include <fdtdec.h>
  32. #include <timer.h>
  33. #include <linux/bitops.h>
  34. #include <asm/io.h>
  35. #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
  36. #define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
  37. #define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
  38. #define TIMER_LOAD_VAL 0xFFFFFFFF
  39. struct arm_twd_timer_regs {
  40. u32 load; /* Timer Load Register */
  41. u32 counter; /* Timer Counter Register */
  42. u32 control; /* Timer Control Register */
  43. };
  44. struct arm_twd_timer_priv {
  45. struct arm_twd_timer_regs *base;
  46. };
  47. static u64 arm_twd_timer_get_count(struct udevice *dev)
  48. {
  49. struct arm_twd_timer_priv *priv = dev_get_priv(dev);
  50. struct arm_twd_timer_regs *regs = priv->base;
  51. u32 count = TIMER_LOAD_VAL - readl(&regs->counter);
  52. return timer_conv_64(count);
  53. }
  54. static int arm_twd_timer_probe(struct udevice *dev)
  55. {
  56. struct arm_twd_timer_priv *priv = dev_get_priv(dev);
  57. struct arm_twd_timer_regs *regs;
  58. fdt_addr_t addr;
  59. addr = dev_read_addr(dev);
  60. if (addr == FDT_ADDR_T_NONE)
  61. return -EINVAL;
  62. priv->base = (struct arm_twd_timer_regs *)addr;
  63. regs = priv->base;
  64. /* Load the timer counter register */
  65. writel(0xFFFFFFFF, &regs->load);
  66. /*
  67. * Start the A9Timer device
  68. * Enable Auto reload mode, Clear prescaler control bits
  69. * Set prescaler value, Enable the decrementer
  70. */
  71. clrsetbits_le32(&regs->control, SCUTIMER_CONTROL_PRESCALER_MASK,
  72. SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
  73. SCUTIMER_CONTROL_ENABLE_MASK);
  74. return 0;
  75. }
  76. static const struct timer_ops arm_twd_timer_ops = {
  77. .get_count = arm_twd_timer_get_count,
  78. };
  79. static const struct udevice_id arm_twd_timer_ids[] = {
  80. { .compatible = "arm,cortex-a9-twd-timer" },
  81. {}
  82. };
  83. U_BOOT_DRIVER(arm_twd_timer) = {
  84. .name = "arm_twd_timer",
  85. .id = UCLASS_TIMER,
  86. .of_match = arm_twd_timer_ids,
  87. .priv_auto = sizeof(struct arm_twd_timer_priv),
  88. .probe = arm_twd_timer_probe,
  89. .ops = &arm_twd_timer_ops,
  90. };