修改时钟频率和DDR参数以调整模块性能负载均衡

linux/arch/arm/boot/dts/ark1668e.dtsi

@@ -320,7 +320,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <16>;
+				div-value = <10>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x58 0x58>;
 				enable-offset = <5 7>;
@@ -336,7 +336,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <16>;
+				div-value = <10>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x5c 0x5c>;
 				enable-offset = <5 7>;
@@ -352,7 +352,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <16>;
+				div-value = <10>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x7c 0x7c>;
 				enable-offset = <5 7>;
@@ -421,7 +421,7 @@
 				index-value = <1>;
 				div-offset = <24>;
 				div-mask = <0xf>;
-				div-value = <3>;
+				div-value = <2>;
 				div-mode = <ARK_CLK_DIVMODE_NOZERO>;
 				//enable-reg = <0x44 0x4c 0x50 0x50>;
 				//enable-offset = <21 15 25 14>;

u-boot/arch/arm/mach-arkmicro/ddr_ark1668e.c

@@ -392,7 +392,7 @@ unsigned int ddr3_sdramc_init(void)
     rDDR_CHARBRB    =  0x20<<24 | 3<<16 |  1<<0 ;
 
 //0xc8
-    rDDR_CHGNTRC    =  0x5<<24 | 0x5<<16 | 0x5<<8 |0x5<<0 ;    
+    rDDR_CHGNTRC    =  0x5<<24 | 0x5<<16 | 0x1f<<8 |0x5<<0 ;
 
 //0x134
  //  rDDR_PHYMISCR2   =   5<<28 | 5<<24 |7<<20 | 3<<16 | 4<<12 | 4<<8 | 4<<4 | 4<<0 ;

u-boot/arch/arm/mach-arkmicro/spl_ark1668e.c

@@ -9,9 +9,9 @@
 
 #define CPUPLL_CLK  800
 #define LCDPLL_CLK	480
-#define AXIPLL_CLK	720
+#define AXIPLL_CLK	480
 #define AHBPLL_CLK	336
-#define APBPLL_CLK	552
+#define APBPLL_CLK	480
 #define DDRPLL_CLK  360
 #define MACPLL_CLK	1000
 #define AUDPLL_CLK	720

u-boot/board/arkmicro/ark1668e_devb/ark1668e_devb.c

@@ -124,7 +124,7 @@ static void usb_controller_reset(void)
 	rSYS_USB1_CFG = 0x3c2e0020;
 }
 
-#define ARK_MMC_CLK     	45000000
+#define ARK_MMC_CLK     	48000000
 #define ARK_MMC_NUM			3
 struct dwmci_host dwmcihost[ARK_MMC_NUM];
 static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
@@ -142,11 +142,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
 
-	/* mmc clk axipll(720M) / ((7 + 1) * 2) */
+	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 
     host->name = name;
     host->ioaddr = (void *)regbase;

u-boot/board/arkmicro/ark1668e_devb_dashboard/ark1668e_devb_dashboard.c

@@ -124,7 +124,7 @@ static void usb_controller_reset(void)
 	rSYS_USB1_CFG = 0x3c2e0020;
 }
 
-#define ARK_MMC_CLK     	45000000
+#define ARK_MMC_CLK     	48000000
 #define ARK_MMC_NUM			3
 struct dwmci_host dwmcihost[ARK_MMC_NUM];
 static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
@@ -142,11 +142,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
 
-	/* mmc clk axipll(720M) / ((7 + 1) * 2) */
+	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 
     host->name = name;
     host->ioaddr = (void *)regbase;

u-boot/board/arkmicro/ark1668e_devb_emmc/ark1668e_devb_emmc.c

@@ -127,7 +127,7 @@ static void usb_controller_reset(void)
 	udelay(10);
 }
 
-#define ARK_MMC_CLK     	45000000
+#define ARK_MMC_CLK     	48000000
 #define ARK_MMC_NUM			3
 struct dwmci_host dwmcihost[ARK_MMC_NUM];
 static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
@@ -145,11 +145,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
 
-	/* mmc clk axipll(720M) / ((7 + 1) * 2) */
+	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
+	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
 
     host->name = name;
     host->ioaddr = (void *)regbase;