修改ddr参数以及相关的时钟调整

linux/arch/arm/boot/dts/ark1668e.dtsi

@@ -320,7 +320,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <10>;
+				div-value = <16>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x58 0x58>;
 				enable-offset = <5 7>;
@@ -336,7 +336,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <10>;
+				div-value = <16>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x5c 0x5c>;
 				enable-offset = <5 7>;
@@ -352,7 +352,7 @@
 				index-value = <1>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
-				div-value = <10>;
+				div-value = <16>;
 				div-mode = <ARK_CLK_DIVMODE_PONEDOUBLE>;
 				enable-reg = <0x7c 0x7c>;
 				enable-offset = <5 7>;
@@ -411,7 +411,7 @@
 				index-value = <1>;
 				div-offset = <24>;
 				div-mask = <0xf>;
-				div-value = <2>;
+				div-value = <3>;
 				div-mode = <ARK_CLK_DIVMODE_NOZERO>;
 				//enable-reg = <0x44 0x4c 0x50 0x50>;
 				//enable-offset = <21 15 25 14>;

u-boot/arch/arm/mach-arkmicro/ddr_ark1668e.c

@@ -110,10 +110,6 @@
 #define DDR_CFG_0   	   *((volatile unsigned int *)(AHB_SYS_BASE + 0x210))
 #define DDR_CFG_1   	   *((volatile unsigned int *)(AHB_SYS_BASE + 0x214))
 
-
-#define  DDR_RATE   1600
-
-
 #define DDR3_1600
 
 #ifdef  DDR3_1600 
@@ -265,26 +261,22 @@ int DDRTraining(void)
 //#if 1
 unsigned int ddr3_sdramc_init(void)
 {
-	unsigned i;
 	int dll_frange=0;
 //softa
 	SYS_SOFT_RST_N_B = 0xfffffffd;
 	udelay (1); //
-	if(DDR_RATE<400)    
-	dll_frange = 0;
-	else if(400<=DDR_RATE<600)
-	dll_frange = 1;
-	else if(600<=DDR_RATE<700)
-	dll_frange = 2;
-	else if(700<=DDR_RATE<800)
-	dll_frange = 3;
-	else if(800<=DDR_RATE<900)  
-	dll_frange = 4;
-	else if(900<=DDR_RATE<1000)
-	dll_frange = 5;
-	else if(1000<=DDR_RATE<1200) 
-	dll_frange = 6;
-	else if(1200<=DDR_RATE)  
+
+	/*
+	dll_frange	ddr data rate(freq*2)
+		0	:	[0-400)
+		1	:	[400-600)
+		2	:	[600-700)
+		3	:	[700-800)
+		4	:	[800-900)
+		5	:	[900-1000)
+		6	:	[1000-1200)
+		7	:	[1200-1600)
+	*/
 	dll_frange = 7;
 	DDR_CFG_0 = 0x06060860|(dll_frange<<28);
 //apb_sys, DDR_CFG_1
@@ -348,13 +340,13 @@ unsigned int ddr3_sdramc_init(void)
     rDDR_PHYCR0  = 1 << 13 | 1 << 11 | 1 << 10 | 1 << 9 | 1 << 8 | 2<<4 | 2<<0; 	
 
 //0x24
-    rDDR_PHYRDTR   =  7<<28 | 7<<24 | 7<<20 | 7<<16 | 7<<12 | 7<<8 | 7<<4 | 7<<0;	
+    rDDR_PHYRDTR   =  9<<4 | 9<<0;
 	
 //0x130                   
-    rDDR_PHYRDTFR  	 =  7<<28 | 7<<24 | 7<<20 | 7<<16 | 7<<12 | 7<<8 | 7<<4 | 7<<0;	
+    rDDR_PHYRDTFR  	 =  9<<4 | 9<<0;
 	
  //0x78
-    rDDR_WRDLLCR     =  8<<12 | 8<<8 | 8<<4 | 8<<0;
+    rDDR_WRDLLCR     =  10<<4 | 10<<0;
 /*	
 //0x28
     rDDR_COMPBLKCR =   0x1f<<7 | 0x1f<<1 | 1<<0;
@@ -426,6 +418,6 @@ unsigned int ddr3_sdramc_init(void)
  	while(!((rDDR_MCSR>>8)&0x1));
 	udelay (1);
 
-	printf("DDR3 256*16_20220402\n");
+	printf("DDR3 256*16_20221130\n");
     return 0;
 }

u-boot/arch/arm/mach-arkmicro/spl_ark1668e.c

@@ -9,10 +9,10 @@
 
 #define CPUPLL_CLK  800
 #define LCDPLL_CLK	480
-#define AXIPLL_CLK	480
+#define AXIPLL_CLK	720
 #define AHBPLL_CLK	336
 #define APBPLL_CLK	552
-#define DDRPLL_CLK  400
+#define DDRPLL_CLK  360
 #define MACPLL_CLK	1000
 #define AUDPLL_CLK	720
 

u-boot/board/arkmicro/ark1668e_devb/ark1668e_devb.c

@@ -124,7 +124,7 @@ static void usb_controller_reset(void)
 	rSYS_USB1_CFG = 0x3c2e0020;
 }
 
-#define ARK_MMC_CLK     	48000000
+#define ARK_MMC_CLK     	45000000
 struct dwmci_host dwmcihost[2];
 static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 {
@@ -141,11 +141,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
 
-	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
+	/* mmc clk axipll(720M) / ((7 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
 
     host->name = name;
     host->ioaddr = (void *)regbase;

u-boot/board/arkmicro/ark1668e_devb_emmc/ark1668e_devb_emmc.c

@@ -233,7 +233,7 @@ static void usb_controller_reset(void)
 	udelay(10);
 }
 
-#define ARK_MMC_CLK     	48000000
+#define ARK_MMC_CLK     	45000000
 struct dwmci_host dwmcihost[2];
 static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 {
@@ -250,11 +250,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
 
-	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
+	/* mmc clk axipll(720M) / ((7 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 7;
 
     host->name = name;
     host->ioaddr = (void *)regbase;