调整时钟配置，优化DMA和MFC解码(时钟配置如果和服务器上有差异请联系原厂确认修改)

linux/arch/arm/boot/dts/ark1668e.dtsi

@@ -333,7 +333,7 @@
 				reg = <0x58>;
 				index-offset = <8>;
 				index-mask = <0xf>;
-				index-value = <1>;
+				index-value = <0>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
 				div-value = <10>;
@@ -349,7 +349,7 @@
 				reg = <0x5c>;
 				index-offset = <8>;
 				index-mask = <0xf>;
-				index-value = <1>;
+				index-value = <0>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
 				div-value = <10>;
@@ -365,7 +365,7 @@
 				reg = <0x7c>;
 				index-offset = <8>;
 				index-mask = <0xf>;
-				index-value = <1>;
+				index-value = <0>;
 				div-offset = <0>;
 				div-mask = <0x1f>;
 				div-value = <10>;

linux/drivers/soc/arkmicro/hx170dec/dwl_linux.c

@@ -689,8 +689,11 @@ void DWLEnableHW(const void *instance, /*i32 coreID,*/ u32 offset, u32 value)
     regs += isPP ? 60 : 0;
     size = isPP ? 41 : 60;
 
-	for (i = size - 1; i >= 1; i--)
+	for (i = size - 1; i >= 1; i--) {
+		volatile u32 tmp = *(volatile u32*)(&io[(isPP ? 60 : 0) + i]);
+		(void)tmp;
 		io[(isPP ? 60 : 0) + i] =   regs[i];
+	}
 }
 
 /*------------------------------------------------------------------------------
@@ -725,8 +728,11 @@ void DWLDisableHW(const void *instance, /*i32 coreID,*/ u32 offset, u32 value)
     regs += isPP ? 60 : 0;
     size = isPP ? 41 : 60;
 
-	for (i = size - 1; i >= 1; i--)
+	for (i = size - 1; i >= 1; i--) {
+		volatile u32 tmp = *(volatile u32*)(&io[(isPP ? 60 : 0) + i]);
+		(void)tmp;
 		io[(isPP ? 60 : 0) + i] =   regs[i];
+	}
 }
 
 /*------------------------------------------------------------------------------

linux/drivers/soc/arkmicro/hx170dec/hx170dec.c

@@ -68,6 +68,8 @@ EXPORT_SYMBOL(get_bootanimation_status);
 
 static inline void vdec_writel(const struct vdec_device *p, unsigned offset, u32 val)
 {
+	volatile u32 tmp = readl(p->mmio_base + offset);
+	(void)tmp;
 	writel(val, p->mmio_base + offset);
 }
 

u-boot/arch/arm/mach-arkmicro/spl_ark1668e.c

@@ -7,7 +7,7 @@
 #include <asm-generic/gpio.h>
 #define CPUPLL_CLK  800
 #define LCDPLL_CLK	480
-#define AXIPLL_CLK	480
+#define AXIPLL_CLK	432
 #define AHBPLL_CLK	336
 #define APBPLL_CLK	480
 #define DDRPLL_CLK  360
@@ -210,7 +210,7 @@ static void switch_to_main_crystal_osc(void)
 	/* the mfc clk can't reconfig at other place */
 	regval = read_sys_reg(SYS_DEVICE_CLK_CFG1);
 	regval &= ~(0x7 << 16);
-	regval |= (1 << 16);
+	regval |= (2 << 16);
 	write_sys_reg(regval, SYS_DEVICE_CLK_CFG1);
 	udelay(50);
 	regval = read_sys_reg(SYS_DEVICE_CLK_CFG1);

u-boot/board/arkmicro/ark1668e_devb/ark1668e_devb.c

@@ -126,11 +126,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD_CLK_CFG |= 52 << 13;
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
-	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
+	/* mmc clk apbpll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD1_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
     host->name = name;
     host->ioaddr = (void *)regbase;
     host->buswidth = bus_width;

u-boot/board/arkmicro/ark1668e_devb_dashboard/ark1668e_devb_dashboard.c

@@ -126,11 +126,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD_CLK_CFG |= 52 << 13;
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
-	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
+	/* mmc clk apbpll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD1_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
     host->name = name;
     host->ioaddr = (void *)regbase;
     host->buswidth = bus_width;

u-boot/board/arkmicro/ark1668e_devb_emmc/ark1668e_devb_emmc.c

@@ -123,11 +123,11 @@ static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
 	//rSYS_SD_CLK_CFG |= 52 << 13;
 	//rSYS_SD1_CLK_CFG &= ~(0x7f << 13);
 	//rSYS_SD1_CLK_CFG |= 52 << 13;
-	/* mmc clk axipll(480M) / ((4 + 1) * 2) */
+	/* mmc clk apbpll(480M) / ((4 + 1) * 2) */
 	rSYS_SD_CLK_CFG &= ~0xfff;
-	rSYS_SD_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
 	rSYS_SD1_CLK_CFG &= ~0xfff;
-	rSYS_SD1_CLK_CFG |= (1 << 8) | (1 << 7) | (1 << 5) | 4;
+	rSYS_SD1_CLK_CFG |= (0 << 8) | (1 << 7) | (1 << 5) | 4;
 	host->name = name;
 	host->ioaddr = (void *)regbase;
 	host->buswidth = bus_width;