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@@ -395,7 +395,7 @@
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index-value = <2>;
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div-offset = <11>;
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div-mask = <0xf>;
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- div-value = <3>;
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+ div-value = <2>;
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div-mode = <ARK_CLK_DIVMODE_NOZERO>;
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enable-reg = <0x44 0x4c 0x50>;
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enable-offset = <19 8 23>;
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@@ -516,7 +516,7 @@
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compatible = "snps,axi-dma-1.01a";
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reg = <0xe0000000 0x1000>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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- clocks = <&ahbpll>, <&ahbpll>;
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+ clocks = <&axipll>, <&axipll>;
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clock-names = "core-clk", "cfgr-clk";
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#dma-cells = <3>;
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