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4 Коммиты 8aeb6bfb8c ... b3d29b4095

Автор SHA1 Сообщение Дата
  lixh b3d29b4095 fixed issue: Scale busy, patch from ArkMicro 3 лет назад
  lixh 423526130d fixed play no sound or sound stuck issue from ArkMicro 3 лет назад
  lixh beb059fdb9 update usb driver to fixed interrupt process too long issue from ArkMicro 2022.12.13 3 лет назад
  lixh aca8cad003 new DDR para from ArkMicro 2022.12.12 via email 3 лет назад

BIN
bootstrap/ark1668e_devb/ARKSDLDR.bin


+ 30 - 0
buildroot-external/package/libarkapi/software/src/ark_video.c

@@ -21,11 +21,22 @@
 #include "ark_2d.h"
 #endif
 
+#define ARK_DVR_IOC_MAGIC			'n'
+
+#define VIN_UPDATE_WINDOW		_IOWR(ARK_DVR_IOC_MAGIC, 50, struct vin_screen)
+#define VIN_START				_IO(ARK_DVR_IOC_MAGIC, 51)
+#define VIN_STOP				_IO(ARK_DVR_IOC_MAGIC, 52)
+#define VIN_SWITCH_CHANNEL		_IOWR(ARK_DVR_IOC_MAGIC, 53, int)
+#define VIN_CONFIG				_IOWR(ARK_DVR_IOC_MAGIC, 54, int)
+#define VIN_IOCTL_DOWN_IDLE		_IO(ARK_DVR_IOC_MAGIC, 55)
+#define VIN_IOCTL_UP_IDLE				_IO(ARK_DVR_IOC_MAGIC, 56)
+
 struct display_data *pdd = NULL;
 
 //#define DECODE_SCALE_PARALLEL
 
 static int mirror_w = 0, mirror_h = 0;
+static int vin_fd;
 
 static int get_shared_display_data(void)
 {
@@ -418,6 +429,13 @@ video_handle *arkapi_video_init(int stream_type)
 		goto err2;
 	}
 
+	vin_fd = open("/dev/video0",O_RDWR);
+	if( vin_fd < 0 )
+	{
+		printf("++++++open error.\n");
+		goto err2;
+	}
+
 	if (sem_init(&handle->sem_lock, 1, 1) < 0) {
 		printf("%s sem_init fail\n", __func__);
 		goto err2;
@@ -642,6 +660,8 @@ void arkapi_video_release(video_handle *handle)
 	sem_destroy(&handle->sem_lock);
 	free(handle);
 
+	close(vin_fd);
+
 	ark_dbg("%s: <---sucess.\n", __func__);
 
 	return;
@@ -679,7 +699,17 @@ int arkapi_video_play(video_handle *handle, const void *src_addr, int len, int f
 		len = MAX_STREAM_BUFFER_SIZE;
 	handle->in_buffer.size = len;
 	handle->out_buffer.num = 0;
+
+	ret = ioctl(vin_fd, VIN_IOCTL_DOWN_IDLE, 0);
+	if(ret < 0)
+		printf("VIN_IOCTL_DOWN_IDLE error\n");
+
 	ret = mfc_decode(handle->handle_mfc, &handle->in_buffer, &handle->out_buffer);
+
+	ret = ioctl(vin_fd, VIN_IOCTL_UP_IDLE, 0);
+	if(ret < 0)
+		printf("VIN_IOCTL_UP_IDLE error\n");
+
 	if (ret) {
 		printf("mfc_decode fail, ret=%d.\n", ret);
 		arkapi_video_unlock(handle);

Разница между файлами не показана из-за своего большого размера
+ 565 - 459
linux/drivers/dma/ark-axi-dma.c


+ 27 - 43
linux/drivers/dma/ark-axi-dma.h

@@ -21,32 +21,15 @@
 #define DMAC_MAX_CHANNELS	8
 #define DMAC_MAX_MASTERS	2
 #define DMAC_MAX_BLK_SIZE	0x200000
-#define DMAX_MAX_BLK_MASK	(0x1fffff)
+#define DMAX_MAX_BLK_MASK	0x1fffff
 #define DMAC_MAX_NR_REQUESTS	32
 
 /* Bitfields in LLP */
 #define DWC_LLP_LMS(x)		((x) & 1)	/* list master select */
 #define DWC_LLP_LOC(x)		((x) & ~0x3f)	/* next lli */
 
-
-/**
- * struct dw_axi_dma_slave - Controller-specific information about a slave
- *
- * @dma_dev:	required DMA master device
- * @src_id:	src request line
- * @dst_id:	dst request line
- * @m_master:	memory master for transfers on allocated channel
- * @p_master:	peripheral master for transfers on allocated channel
- * @hs_polarity:set active low polarity of handshake interface
- */
-struct dw_axi_dma_slave {
-	struct device		*dma_dev;
-	u8			src_id;
-	u8			dst_id;
-	u8			m_master;
-	u8			p_master;
-	bool			hs_polarity;
-};
+//#define DMA_GUARD_TIMER
+#define DMA_GUARD_TIMER_PERIOD	500000000 //500 ms
 
 struct dw_axi_dma_hcfg {
 	u32	nr_channels;
@@ -63,27 +46,29 @@ struct axi_dma_chan {
 	struct axi_dma_chip		*chip;
 	void __iomem			*chan_regs;
 	u8				id;
+	u8				hw_handshake_num;
+	u8				m_master;
+	u8				p_master;
 	atomic_t			descs_allocated;
 
+	struct dma_pool			*desc_pool;
 	struct virt_dma_chan		vc;
 
+	struct axi_dma_desc		*desc;
+	struct dma_slave_config		config;
+	enum dma_transfer_direction	direction;
+	bool				cyclic;
 	/* these other elements are all protected by vc.lock */
 	bool				is_paused;
-
-	enum dma_transfer_direction	direction;
-
-	/* custom slave configuration */
-	struct dw_axi_dma_slave	dws;
-
-	/* configuration passed via .device_config */
-	struct dma_slave_config dma_sconfig;
-	int	cyclic;
+#ifdef DMA_GUARD_TIMER
+	struct hrtimer	hrt;
+#endif
 };
 
 struct dw_axi_dma {
 	struct dma_device	dma;
 	struct dw_axi_dma_hcfg	*hdata;
-	struct dma_pool		*desc_pool;
+	struct device_dma_parameters	dma_parms;
 
 	/* channels */
 	struct axi_dma_chan	*chan;
@@ -115,13 +100,20 @@ struct __packed axi_dma_lli {
 	__le32		reserved_hi;
 };
 
+struct axi_dma_hw_desc {
+	struct axi_dma_lli	*lli;
+	dma_addr_t		llp;
+	u32			len;
+};
+
 struct axi_dma_desc {
-	struct axi_dma_lli		lli;
+	struct axi_dma_hw_desc	*hw_desc;
+
 	struct virt_dma_desc		vd;
 	struct axi_dma_chan		*chan;
-	struct list_head		xfer_list;
-	size_t				len;
-	size_t				total_len;		
+	u32				completed_blocks;
+	u32				length;
+	u32				period_len;
 };
 
 static inline struct device *dchan2dev(struct dma_chan *dchan)
@@ -193,6 +185,7 @@ static inline struct axi_dma_chan *dchan_to_axi_dma_chan(struct dma_chan *dchan)
 #define CH_INTSIGNAL_ENA	0x090 /* R/W Chan Interrupt Signal Enable */
 #define CH_INTCLEAR		0x098 /* W Chan Interrupt Clear */
 
+#define MAX_BLOCK_SIZE		0x1000 /* 1024 blocks * 4 bytes data width */
 
 /* DMAC_CFG */
 #define DMAC_EN_POS			0
@@ -236,8 +229,6 @@ enum {
 
 #define CH_CTL_L_DST_MSIZE_POS		18
 #define CH_CTL_L_SRC_MSIZE_POS		14
-#define DWC_CTLL_DST_MSIZE(n)	((n)<<CH_CTL_L_DST_MSIZE_POS)	/* burst, #elements */
-#define DWC_CTLL_SRC_MSIZE(n)	((n)<<CH_CTL_L_SRC_MSIZE_POS)
 
 enum {
 	DWAXIDMAC_BURST_TRANS_LEN_1	= 0,
@@ -254,8 +245,6 @@ enum {
 
 #define CH_CTL_L_DST_WIDTH_POS		11
 #define CH_CTL_L_SRC_WIDTH_POS		8
-#define DWC_CTLL_DST_WIDTH(n)		((n)<<CH_CTL_L_DST_WIDTH_POS)	/* bytes per element */
-#define DWC_CTLL_SRC_WIDTH(n)		((n)<<CH_CTL_L_SRC_WIDTH_POS)
 
 #define CH_CTL_L_DST_INC_POS		6
 #define CH_CTL_L_SRC_INC_POS		4
@@ -263,10 +252,6 @@ enum {
 	DWAXIDMAC_CH_CTL_L_INC		= 0,
 	DWAXIDMAC_CH_CTL_L_NOINC
 };
-#define DWC_CTLL_DST_INC			(DWAXIDMAC_CH_CTL_L_INC<<CH_CTL_L_DST_INC_POS)		/* DAR update/not */
-#define DWC_CTLL_DST_FIX			(DWAXIDMAC_CH_CTL_L_NOINC<<CH_CTL_L_DST_INC_POS)
-#define DWC_CTLL_SRC_INC			(DWAXIDMAC_CH_CTL_L_INC<<CH_CTL_L_SRC_INC_POS)		/* SAR update/not */
-#define DWC_CTLL_SRC_FIX			(DWAXIDMAC_CH_CTL_L_NOINC<<CH_CTL_L_SRC_INC_POS)
 
 #define CH_CTL_L_DST_MAST		BIT(2)
 #define CH_CTL_L_SRC_MAST		BIT(0)
@@ -293,7 +278,6 @@ enum {
 	DWAXIDMAC_TT_FC_MEM_TO_PER_DST,
 	DWAXIDMAC_TT_FC_PER_TO_PER_DST
 };
-#define DWC_CFGH_FC(n)		((n) << CH_CFG_H_TT_FC_POS)
 
 /* CH_CFG_L */
 #define CH_CFG_L_DST_PER_POS			11

+ 21 - 2
linux/drivers/media/platform/arkmicro/ark1668e_vin.c

@@ -490,7 +490,21 @@ static long vin_ioctl_default(struct file *file, void *priv,
 			vin_aux_config(para);
 			break;
 		}
-		
+
+		case VIN_IOCTL_DOWN_IDLE:
+		{
+			//printk(KERN_ALERT "++++++VIN_IOCTL_DOWN_IDLE++++++\n");
+			down_interruptible(&dvr_dev->vin_sem);
+			break;
+		}
+
+		case VIN_IOCTL_UP_IDLE:
+		{
+			//printk(KERN_ALERT "++++++VIN_IOCTL_DOWN_IDLE++++++\n");
+			up(&dvr_dev->vin_sem);
+			break;
+		}
+
 		default:
 			printk("%s: error cmd 0x%x\n", __func__, cmd);
 			error = -EFAULT;
@@ -766,6 +780,8 @@ int dvr_exit_carback(void)
 	ark_vin_disable();
 	spin_unlock(&vin->dvr_dev->spin_lock);
 
+	up(&vin->dvr_dev->vin_sem);
+
 	if(vin->dvr_dev->chip_info == TYPE_RN6752){
 		ret = v4l2_subdev_call(vin->current_subdev->sd,core,ioctl,VIDIOC_EXIT_CARBACK,0);
 		if(ret < 0){
@@ -1310,11 +1326,12 @@ static void dither_timeout_timer(struct timer_list *t)
 }
 
 static int vin_start(struct dvr_dev *dvr_dev)
-{ 
+{
 	struct ark1668e_vin_device* vin = NULL;
 	int ret = 0;
 	vin = g_ark1668e_vin;
 	if(!dvr_dev->work_status){
+		down_interruptible(&dvr_dev->vin_sem);
 		dvr_dev->work_status = 1;
 		dvr_dev->discard_frame = START_DISCARD_FRAME;
 		dvr_dev->cur_frame = 0;
@@ -1861,6 +1878,8 @@ static int ark1668e_vin_probe(struct platform_device *pdev)
 	    __FUNCTION__, __LINE__, ark_vin->dvr_dev->context.deinterlace_irq, ret);
 	}
 
+	sema_init(&ark_vin->dvr_dev->vin_sem, 1);
+
 	timer_setup(&ark_vin->dvr_dev->timer, dither_timeout_timer, 0);
 	timer_setup(&ark_vin->dvr_dev->signal_timer, vin_get_signal_time, 0);
 

+ 3 - 0
linux/drivers/media/platform/arkmicro/ark1668e_vin.h

@@ -172,6 +172,7 @@ struct dvr_dev{
 	int first_show_flag;
 	int dev_major, dev_minor;
     spinlock_t spin_lock;
+	struct semaphore vin_sem;
 	struct work_struct scale_work;
 	struct workqueue_struct *scale_queue;
 	struct work_struct detect_work;
@@ -255,6 +256,8 @@ struct vin_screen {
 #define VIN_STOP				_IO(ARK_DVR_IOC_MAGIC, 52)
 #define VIN_SWITCH_CHANNEL		_IOWR(ARK_DVR_IOC_MAGIC, 53, int)
 #define VIN_CONFIG				_IOWR(ARK_DVR_IOC_MAGIC, 54, struct vin_para)
+#define VIN_IOCTL_DOWN_IDLE            _IO(ARK_DVR_IOC_MAGIC, 55)
+#define VIN_IOCTL_UP_IDLE                              _IO(ARK_DVR_IOC_MAGIC, 56)
 
 #endif
 

+ 2 - 2
linux/drivers/usb/musb/musb_ark.c

@@ -374,9 +374,9 @@ static int ark_musb_set_mode(struct musb *musb, u8 mode)
 	void __iomem *sys_softrest_base = (void __iomem *)((unsigned int)glue->sys_base + glue->usb_softrest_reg_offset);
 	u32 regval;
 
-	usb_hcd_resume_root_hub(musb->hcd);
+	/*usb_hcd_resume_root_hub(musb->hcd);
 	musb_root_disconnect(musb);
-	musb_g_reset(musb);
+	musb_g_reset(musb);*/
 
 	switch (mode) {
 		case MUSB_HOST:

+ 1 - 0
linux/drivers/usb/musb/musb_core.c

@@ -1219,6 +1219,7 @@ b_host:
 
 		switch (musb->xceiv->otg->state) {
 		case OTG_STATE_A_HOST:
+		case OTG_STATE_A_WAIT_BCON:
 		case OTG_STATE_A_SUSPEND:
 			musb_host_resume_root_hub(musb);
 			musb_root_disconnect(musb);

+ 4 - 0
linux/drivers/usb/musb/musb_host.c

@@ -90,7 +90,11 @@ static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep)
 	struct musb	*musb = ep->musb;
 	void __iomem	*epio = ep->regs;
 	u16		csr;
+#if NICHOLAS_ADD
+	int		retries = 1;
+#else
 	int		retries = 1000;
+#endif
 
 	csr = musb_readw(epio, MUSB_TXCSR);
 	while (csr & MUSB_TXCSR_FIFONOTEMPTY) {

+ 4 - 4
u-boot/arch/arm/mach-arkmicro/ddr_ark1668e.c

@@ -340,13 +340,13 @@ unsigned int ddr3_sdramc_init(void)
     rDDR_PHYCR0  = 1 << 13 | 1 << 11 | 1 << 10 | 1 << 9 | 1 << 8 | 2<<4 | 2<<0; 	
 
 //0x24
-    rDDR_PHYRDTR   =  7<<28 | 7<<24 | 7<<20 | 7<<16 | 7<<12 | 7<<8 | 7<<4 | 7<<0;	
+    rDDR_PHYRDTR   =  9<<4 | 9<<0;	
 	
 //0x130                   
-    rDDR_PHYRDTFR  	 =  7<<28 | 7<<24 | 7<<20 | 7<<16 | 7<<12 | 7<<8 | 7<<4 | 7<<0;	
+    rDDR_PHYRDTFR  	 =  9<<4 | 9<<0;	
 	
  //0x78
-    rDDR_WRDLLCR     =  8<<12 | 8<<8 | 8<<4 | 8<<0;
+    rDDR_WRDLLCR     =  10<<4 | 10<<0;
 /*	
 //0x28
     rDDR_COMPBLKCR =   0x1f<<7 | 0x1f<<1 | 1<<0;
@@ -418,6 +418,6 @@ unsigned int ddr3_sdramc_init(void)
  	while(!((rDDR_MCSR>>8)&0x1));
 	udelay (1);
 
-	printf("DDR3 256*16_20220402\n");
+	printf("DDR3 256*16_20221130\n");
     return 0;
 }

Некоторые файлы не были показаны из-за большого количества измененных файлов