encasiccontroller.h 7.9 KB

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  1. /*------------------------------------------------------------------------------
  2. -- --
  3. -- This software is confidential and proprietary and may be used --
  4. -- only as expressly authorized by a licensing agreement from --
  5. -- --
  6. -- Hantro Products Oy. --
  7. -- --
  8. -- (C) COPYRIGHT 2006 HANTRO PRODUCTS OY --
  9. -- ALL RIGHTS RESERVED --
  10. -- --
  11. -- The entire notice above must be reproduced --
  12. -- on all copies and should not be removed. --
  13. -- --
  14. --------------------------------------------------------------------------------
  15. --
  16. -- Description : ASIC low level controller
  17. --
  18. ------------------------------------------------------------------------------*/
  19. #ifndef __ENC_ASIC_CONTROLLER_H__
  20. #define __ENC_ASIC_CONTROLLER_H__
  21. #include "basetype.h"
  22. #include "enccfg.h"
  23. #include "ewl.h"
  24. /* HW status register bits */
  25. #define ASIC_STATUS_ALL 0x1FD
  26. #define ASIC_STATUS_SLICE_READY 0x100
  27. #define ASIC_STATUS_TEST_IRQ2 0x080
  28. #define ASIC_STATUS_TEST_IRQ1 0x040
  29. #define ASIC_STATUS_BUFF_FULL 0x020
  30. #define ASIC_STATUS_HW_RESET 0x010
  31. #define ASIC_STATUS_ERROR 0x008
  32. #define ASIC_STATUS_FRAME_READY 0x004
  33. #define ASIC_IRQ_LINE 0x001
  34. #define ASIC_STATUS_ENABLE 0x001
  35. #define ASIC_H264_BYTE_STREAM 0x00
  36. #define ASIC_H264_NAL_UNIT 0x01
  37. #define ASIC_INPUT_YUV420PLANAR 0x00
  38. #define ASIC_INPUT_YUV420SEMIPLANAR 0x01
  39. #define ASIC_INPUT_YUYV422INTERLEAVED 0x02
  40. #define ASIC_INPUT_UYVY422INTERLEAVED 0x03
  41. #define ASIC_INPUT_RGB565 0x04
  42. #define ASIC_INPUT_RGB555 0x05
  43. #define ASIC_INPUT_RGB444 0x06
  44. #define ASIC_INPUT_RGB888 0x07
  45. #define ASIC_INPUT_RGB101010 0x08
  46. #define ASIC_INPUT_YUYV422TILED 0x09
  47. typedef enum
  48. {
  49. IDLE = 0, /* Initial state, both HW and SW disabled */
  50. HWON_SWOFF, /* HW processing, SW waiting for HW */
  51. HWON_SWON, /* Both HW and SW processing */
  52. HWOFF_SWON, /* HW is paused or disabled, SW is processing */
  53. DONE
  54. } bufferState_e;
  55. typedef enum
  56. {
  57. ASIC_MPEG4 = 0,
  58. ASIC_H263 = 1,
  59. ASIC_JPEG = 2,
  60. ASIC_H264 = 3
  61. } asicCodingType_e;
  62. typedef enum
  63. {
  64. ASIC_P_16x16 = 0,
  65. ASIC_P_16x8 = 1,
  66. ASIC_P_8x16 = 2,
  67. ASIC_P_8x8 = 3,
  68. ASIC_I_4x4 = 4,
  69. ASIC_I_16x16 = 5
  70. } asicMbType_e;
  71. typedef enum
  72. {
  73. ASIC_INTER = 0,
  74. ASIC_INTRA = 1,
  75. ASIC_MVC = 2,
  76. ASIC_MVC_REF_MOD = 3
  77. } asicFrameCodingType_e;
  78. typedef struct
  79. {
  80. u32 irqDisable;
  81. u32 irqInterval;
  82. u32 mbsInCol;
  83. u32 mbsInRow;
  84. u32 qp;
  85. u32 qpMin;
  86. u32 qpMax;
  87. u32 constrainedIntraPrediction;
  88. u32 roundingCtrl;
  89. u32 frameCodingType;
  90. u32 codingType;
  91. u32 pixelsOnRow;
  92. u32 xFill;
  93. u32 yFill;
  94. u32 ppsId;
  95. u32 idrPicId;
  96. u32 frameNum;
  97. u32 picInitQp;
  98. i32 sliceAlphaOffset;
  99. i32 sliceBetaOffset;
  100. u32 filterDisable;
  101. u32 transform8x8Mode;
  102. u32 enableCabac;
  103. u32 cabacInitIdc;
  104. i32 chromaQpIndexOffset;
  105. u32 sliceSizeMbRows;
  106. u32 inputImageFormat;
  107. u32 inputImageRotation;
  108. u32 outputStrmBase;
  109. u32 outputStrmSize;
  110. u32 firstFreeBit;
  111. u32 strmStartMSB;
  112. u32 strmStartLSB;
  113. u32 rlcBase;
  114. u32 rlcLimitSpace;
  115. union
  116. {
  117. u32 nal;
  118. u32 vp;
  119. u32 gob;
  120. } sizeTblBase;
  121. u32 sliceReadyInterrupt;
  122. u32 recWriteDisable;
  123. u32 reconImageId;
  124. u32 internalImageLumBaseW;
  125. u32 internalImageChrBaseW;
  126. u32 internalImageLumBaseR;
  127. u32 internalImageChrBaseR;
  128. u32 inputLumBase;
  129. u32 inputCbBase;
  130. u32 inputCrBase;
  131. u32 cpDistanceMbs;
  132. u32 *cpTargetResults;
  133. const u32 *cpTarget;
  134. const i32 *targetError;
  135. const i32 *deltaQp;
  136. u32 rlcCount;
  137. u32 qpSum;
  138. u32 h264StrmMode; /* 0 - byte stream, 1 - NAL units */
  139. u32 sizeTblPresent;
  140. u32 gobHeaderMask;
  141. u32 gobFrameId;
  142. u8 quantTable[8 * 8 * 2];
  143. u32 jpegMode;
  144. u32 jpegSliceEnable;
  145. u32 jpegRestartInterval;
  146. u32 jpegRestartMarker;
  147. u32 regMirror[64];
  148. u32 inputLumaBaseOffset;
  149. u32 inputLumaBaseOffsetVert;
  150. u32 inputChromaBaseOffset;
  151. u32 h264Inter4x4Disabled;
  152. u32 disableQuarterPixelMv;
  153. u32 vsNextLumaBase;
  154. u32 vsMode;
  155. u32 vpSize;
  156. u32 vpMbBits;
  157. u32 hec;
  158. u32 moduloTimeBase;
  159. u32 intraDcVlcThr;
  160. u32 vopFcode;
  161. u32 timeInc;
  162. u32 timeIncBits;
  163. u32 asicCfgReg;
  164. u32 asicHwId;
  165. u32 intra16Favor;
  166. u32 interFavor;
  167. u32 skipPenalty;
  168. u32 diffMvPenalty;
  169. u32 diffMvPenalty4p;
  170. i32 madQpDelta;
  171. u32 madThreshold;
  172. u32 madCount;
  173. u32 mvcAnchorPicFlag;
  174. u32 mvcPriorityId;
  175. u32 mvcViewId;
  176. u32 mvcTemporalId;
  177. u32 mvcInterViewFlag;
  178. u32 cirStart;
  179. u32 cirInterval;
  180. u32 intraSliceMap1;
  181. u32 intraSliceMap2;
  182. u32 intraSliceMap3;
  183. u32 intraAreaTop;
  184. u32 intraAreaLeft;
  185. u32 intraAreaBottom;
  186. u32 intraAreaRight;
  187. u32 roi1Top;
  188. u32 roi1Left;
  189. u32 roi1Bottom;
  190. u32 roi1Right;
  191. u32 roi2Top;
  192. u32 roi2Left;
  193. u32 roi2Bottom;
  194. u32 roi2Right;
  195. i32 roi1DeltaQp;
  196. i32 roi2DeltaQp;
  197. u32 mvOutputBase;
  198. u32 cabacCtxBase;
  199. u32 colorConversionCoeffA;
  200. u32 colorConversionCoeffB;
  201. u32 colorConversionCoeffC;
  202. u32 colorConversionCoeffE;
  203. u32 colorConversionCoeffF;
  204. u32 rMaskMsb;
  205. u32 gMaskMsb;
  206. u32 bMaskMsb;
  207. #ifdef ASIC_WAVE_TRACE_TRIGGER
  208. u32 vop_count;
  209. #endif
  210. } regValues_s;
  211. typedef struct
  212. {
  213. const void *ewl;
  214. regValues_s regs;
  215. EWLLinearMem_t internalImageLuma[3];
  216. EWLLinearMem_t internalImageChroma[3];
  217. EWLLinearMem_t cabacCtx;
  218. EWLLinearMem_t mvOutput;
  219. u32 sizeTblSize;
  220. union
  221. {
  222. EWLLinearMem_t nal;
  223. EWLLinearMem_t vp;
  224. EWLLinearMem_t gob;
  225. } sizeTbl;
  226. } asicData_s;
  227. /*------------------------------------------------------------------------------
  228. 4. Function prototypes
  229. ------------------------------------------------------------------------------*/
  230. i32 EncAsicControllerInit(asicData_s * asic);
  231. i32 EncAsicMemAlloc_V2(asicData_s * asic, u32 width, u32 height,
  232. u32 encodingType, u32 numRefBuffsLum, u32 numRefBuffsChr);
  233. void EncAsicMemFree_V2(asicData_s * asic);
  234. /* Functions for controlling ASIC */
  235. void EncAsicSetQuantTable(asicData_s * asic,
  236. const u8 * lumTable, const u8 * chTable);
  237. void EncAsicGetRegisters(const void *ewl, regValues_s * val);
  238. u32 EncAsicGetStatus(const void *ewl);
  239. u32 EncAsicGetId(const void *ewl);
  240. void EncAsicFrameStart(const void *ewl, regValues_s * val);
  241. void EncAsicStop(const void *ewl);
  242. void EncAsicRecycleInternalImage(asicData_s *asic, u32 numViews, u32 viewId,
  243. u32 anchor, u32 numRefBuffsLum, u32 numRefBuffsChr);
  244. i32 EncAsicCheckStatus_V2(asicData_s * asic);
  245. #ifdef MPEG4_HW_RLC_MODE_ENABLED
  246. i32 EncAsicMemAlloc(asicData_s * asic, u32 width, u32 height, u32 rlcBufSize);
  247. void EncAsicMemFree(asicData_s * asic);
  248. /* Functions for parsing data from ASIC output tables */
  249. asicMbType_e EncAsicMbType(const u32 * control);
  250. i32 EncAsicQp(const u32 * control);
  251. void EncAsicMv(const u32 * control, i8 mv[4], i32 xy);
  252. void EncAsicDc(i32 * mbDc, const u32 * control);
  253. i32 EncAsicRlcCount(const u32 * mbRlc[6], i32 mbRlcCount[6],
  254. const u32 * rlcData, const u32 * control);
  255. void EncAsicFrameContinue(const void *ewl, regValues_s * val);
  256. i32 EncAsicCheckStatus(asicData_s * asic);
  257. #endif /* MPEG4_HW_RLC_MODE_ENABLED */
  258. #endif