mediatek,infracfg.txt 1.0 KB

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  1. Mediatek infracfg controller
  2. ============================
  3. The Mediatek infracfg controller provides various clocks and reset
  4. outputs to the system.
  5. Required Properties:
  6. - compatible: Should be one of:
  7. - "mediatek,mt2701-infracfg", "syscon"
  8. - "mediatek,mt2712-infracfg", "syscon"
  9. - "mediatek,mt6797-infracfg", "syscon"
  10. - "mediatek,mt7622-infracfg", "syscon"
  11. - "mediatek,mt8135-infracfg", "syscon"
  12. - "mediatek,mt8173-infracfg", "syscon"
  13. - #clock-cells: Must be 1
  14. - #reset-cells: Must be 1
  15. The infracfg controller uses the common clk binding from
  16. Documentation/devicetree/bindings/clock/clock-bindings.txt
  17. The available clocks are defined in dt-bindings/clock/mt*-clk.h.
  18. Also it uses the common reset controller binding from
  19. Documentation/devicetree/bindings/reset/reset.txt.
  20. The available reset outputs are defined in
  21. dt-bindings/reset/mt*-resets.h
  22. Example:
  23. infracfg: power-controller@10001000 {
  24. compatible = "mediatek,mt8173-infracfg", "syscon";
  25. reg = <0 0x10001000 0 0x1000>;
  26. #clock-cells = <1>;
  27. #reset-cells = <1>;
  28. };