ctrl.txt 1.9 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182
  1. OMAP Control Module bindings
  2. Control Module contains miscellaneous features under it based on SoC type.
  3. Pincontrol is one common feature, and it has a specialized support
  4. described in [1]. Typically some clock nodes are also under control module.
  5. Syscon is used to share register level access to drivers external to
  6. control module driver itself.
  7. See [2] for documentation about clock/clockdomain nodes.
  8. [1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
  9. [2] Documentation/devicetree/bindings/clock/ti/*
  10. Required properties:
  11. - compatible: Must be one of:
  12. "ti,am3-scm"
  13. "ti,am4-scm"
  14. "ti,dm814-scrm"
  15. "ti,dm816-scrm"
  16. "ti,omap2-scm"
  17. "ti,omap3-scm"
  18. "ti,omap4-scm-core"
  19. "ti,omap4-scm-padconf-core"
  20. "ti,omap4-scm-wkup"
  21. "ti,omap4-scm-padconf-wkup"
  22. "ti,omap5-scm-core"
  23. "ti,omap5-scm-padconf-core"
  24. "ti,omap5-scm-wkup-pad-conf"
  25. "ti,dra7-scm-core"
  26. - reg: Contains Control Module register address range
  27. (base address and length)
  28. Optional properties:
  29. - clocks: clocks for this module
  30. - clockdomains: clockdomains for this module
  31. Examples:
  32. scm: scm@2000 {
  33. compatible = "ti,omap3-scm", "simple-bus";
  34. reg = <0x2000 0x2000>;
  35. #address-cells = <1>;
  36. #size-cells = <1>;
  37. ranges = <0 0x2000 0x2000>;
  38. omap3_pmx_core: pinmux@30 {
  39. compatible = "ti,omap3-padconf",
  40. "pinctrl-single";
  41. reg = <0x30 0x230>;
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. #interrupt-cells = <1>;
  45. interrupt-controller;
  46. pinctrl-single,register-width = <16>;
  47. pinctrl-single,function-mask = <0xff1f>;
  48. };
  49. scm_conf: scm_conf@270 {
  50. compatible = "syscon";
  51. reg = <0x270 0x330>;
  52. #address-cells = <1>;
  53. #size-cells = <1>;
  54. scm_clocks: clocks {
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. };
  58. };
  59. scm_clockdomains: clockdomains {
  60. };
  61. }
  62. &scm_clocks {
  63. mcbsp5_mux_fck: mcbsp5_mux_fck {
  64. #clock-cells = <0>;
  65. compatible = "ti,composite-mux-clock";
  66. clocks = <&core_96m_fck>, <&mcbsp_clks>;
  67. ti,bit-shift = <4>;
  68. reg = <0x02d8>;
  69. };
  70. };