brcm,gisb-arb.txt 1.1 KB

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  1. Broadcom GISB bus Arbiter controller
  2. Required properties:
  3. - compatible:
  4. "brcm,bcm7278-gisb-arb" for V7 28nm chips
  5. "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for other 28nm chips
  6. "brcm,bcm7435-gisb-arb" for newer 40nm chips
  7. "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips
  8. "brcm,bcm7038-gisb-arb" for 130nm chips
  9. - reg: specifies the base physical address and size of the registers
  10. - interrupts: specifies the two interrupts (timeout and TEA) to be used from
  11. the parent interrupt controller
  12. Optional properties:
  13. - brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB
  14. masters are valid at the system level
  15. - brcm,gisb-arb-master-names: string list of the litteral name of the GISB
  16. masters. Should match the number of bits set in brcm,gisb-master-mask and
  17. the order in which they appear
  18. Example:
  19. gisb-arb@f0400000 {
  20. compatible = "brcm,gisb-arb";
  21. reg = <0xf0400000 0x800>;
  22. interrupts = <0>, <2>;
  23. interrupt-parent = <&sun_l2_intc>;
  24. brcm,gisb-arb-master-mask = <0x7>;
  25. brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0";
  26. };