hdmi.txt 2.0 KB

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  1. Freescale i.MX6 DWC HDMI TX Encoder
  2. ===================================
  3. The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
  4. with a companion PHY IP.
  5. These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
  6. Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
  7. following device-specific properties.
  8. Required properties:
  9. - compatible : Shall be one of "fsl,imx6q-hdmi" or "fsl,imx6dl-hdmi".
  10. - reg: See dw_hdmi.txt.
  11. - interrupts: HDMI interrupt number
  12. - clocks: See dw_hdmi.txt.
  13. - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
  14. - ports: See dw_hdmi.txt. The DWC HDMI shall have between one and four ports,
  15. numbered 0 to 3, corresponding to the four inputs of the HDMI multiplexer.
  16. Each port shall have a single endpoint.
  17. - gpr : Shall contain a phandle to the iomuxc-gpr region containing the HDMI
  18. multiplexer control register.
  19. Optional properties
  20. - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
  21. or the functionally-reduced I2C master contained in the DWC HDMI. When
  22. connected to a system I2C master this property contains a phandle to that
  23. I2C master controller.
  24. Example:
  25. gpr: iomuxc-gpr@20e0000 {
  26. /* ... */
  27. };
  28. hdmi: hdmi@120000 {
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. compatible = "fsl,imx6q-hdmi";
  32. reg = <0x00120000 0x9000>;
  33. interrupts = <0 115 0x04>;
  34. gpr = <&gpr>;
  35. clocks = <&clks 123>, <&clks 124>;
  36. clock-names = "iahb", "isfr";
  37. ddc-i2c-bus = <&i2c2>;
  38. port@0 {
  39. reg = <0>;
  40. hdmi_mux_0: endpoint {
  41. remote-endpoint = <&ipu1_di0_hdmi>;
  42. };
  43. };
  44. port@1 {
  45. reg = <1>;
  46. hdmi_mux_1: endpoint {
  47. remote-endpoint = <&ipu1_di1_hdmi>;
  48. };
  49. };
  50. };