cdn-dp-rockchip.txt 2.2 KB

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  1. Rockchip RK3399 specific extensions to the cdn Display Port
  2. ================================
  3. Required properties:
  4. - compatible: must be "rockchip,rk3399-cdn-dp"
  5. - reg: physical base address of the controller and length
  6. - clocks: from common clock binding: handle to dp clock.
  7. - clock-names: from common clock binding:
  8. Required elements: "core-clk" "pclk" "spdif" "grf"
  9. - resets : a list of phandle + reset specifier pairs
  10. - reset-names : string of reset names
  11. Required elements: "apb", "core", "dptx", "spdif"
  12. - power-domains : power-domain property defined with a phandle
  13. to respective power domain.
  14. - assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
  15. - assigned-clock-rates : the DP core clk frequency, shall be: 100000000
  16. - rockchip,grf: this soc should set GRF regs, so need get grf here.
  17. - ports: contain a port nodes with endpoint definitions as defined in
  18. Documentation/devicetree/bindings/media/video-interfaces.txt.
  19. contained 2 endpoints, connecting to the output of vop.
  20. - phys: from general PHY binding: the phandle for the PHY device.
  21. - extcon: extcon specifier for the Power Delivery
  22. - #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
  23. -------------------------------------------------------------------------------
  24. Example:
  25. cdn_dp: dp@fec00000 {
  26. compatible = "rockchip,rk3399-cdn-dp";
  27. reg = <0x0 0xfec00000 0x0 0x100000>;
  28. interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
  29. clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
  30. <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
  31. clock-names = "core-clk", "pclk", "spdif", "grf";
  32. assigned-clocks = <&cru SCLK_DP_CORE>;
  33. assigned-clock-rates = <100000000>;
  34. power-domains = <&power RK3399_PD_HDCP>;
  35. phys = <&tcphy0_dp>, <&tcphy1_dp>;
  36. resets = <&cru SRST_DPTX_SPDIF_REC>;
  37. reset-names = "spdif";
  38. extcon = <&fusb0>, <&fusb1>;
  39. rockchip,grf = <&grf>;
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. #sound-dai-cells = <1>;
  43. ports {
  44. #address-cells = <1>;
  45. #size-cells = <0>;
  46. dp_in: port {
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. dp_in_vopb: endpoint@0 {
  50. reg = <0>;
  51. remote-endpoint = <&vopb_out_dp>;
  52. };
  53. dp_in_vopl: endpoint@1 {
  54. reg = <1>;
  55. remote-endpoint = <&vopl_out_dp>;
  56. };
  57. };
  58. };
  59. };