dw_hdmi-rockchip.txt 2.0 KB

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  1. Rockchip DWC HDMI TX Encoder
  2. ============================
  3. The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
  4. with a companion PHY IP.
  5. These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
  6. Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
  7. following device-specific properties.
  8. Required properties:
  9. - compatible: should be one of the following:
  10. "rockchip,rk3288-dw-hdmi"
  11. "rockchip,rk3399-dw-hdmi"
  12. - reg: See dw_hdmi.txt.
  13. - reg-io-width: See dw_hdmi.txt. Shall be 4.
  14. - interrupts: HDMI interrupt number
  15. - clocks: See dw_hdmi.txt.
  16. - clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
  17. - ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
  18. corresponding to the video input of the controller. The port shall have two
  19. endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
  20. - rockchip,grf: Shall reference the GRF to mux vopl/vopb.
  21. Optional properties
  22. - ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
  23. or the functionally-reduced I2C master contained in the DWC HDMI. When
  24. connected to a system I2C master this property contains a phandle to that
  25. I2C master controller.
  26. - clock-names: See dw_hdmi.txt. The "cec" clock is optional.
  27. - clock-names: May contain "cec" as defined in dw_hdmi.txt.
  28. - clock-names: May contain "grf", power for grf io.
  29. - clock-names: May contain "vpll", external clock for some hdmi phy.
  30. Example:
  31. hdmi: hdmi@ff980000 {
  32. compatible = "rockchip,rk3288-dw-hdmi";
  33. reg = <0xff980000 0x20000>;
  34. reg-io-width = <4>;
  35. ddc-i2c-bus = <&i2c5>;
  36. rockchip,grf = <&grf>;
  37. interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
  38. clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
  39. clock-names = "iahb", "isfr";
  40. ports {
  41. hdmi_in: port {
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. hdmi_in_vopb: endpoint@0 {
  45. reg = <0>;
  46. remote-endpoint = <&vopb_out_hdmi>;
  47. };
  48. hdmi_in_vopl: endpoint@1 {
  49. reg = <1>;
  50. remote-endpoint = <&vopl_out_hdmi>;
  51. };
  52. };
  53. };
  54. };