rockchip-lvds.txt 2.5 KB

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  1. Rockchip RK3288 LVDS interface
  2. ================================
  3. Required properties:
  4. - compatible: matching the soc type, one of
  5. - "rockchip,rk3288-lvds";
  6. - reg: physical base address of the controller and length
  7. of memory mapped region.
  8. - clocks: must include clock specifiers corresponding to entries in the
  9. clock-names property.
  10. - clock-names: must contain "pclk_lvds"
  11. - avdd1v0-supply: regulator phandle for 1.0V analog power
  12. - avdd1v8-supply: regulator phandle for 1.8V analog power
  13. - avdd3v3-supply: regulator phandle for 3.3V analog power
  14. - rockchip,grf: phandle to the general register files syscon
  15. - rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface
  16. Optional properties:
  17. - pinctrl-names: must contain a "lcdc" entry.
  18. - pinctrl-0: pin control group to be used for this controller.
  19. Required nodes:
  20. The lvds has two video ports as described by
  21. Documentation/devicetree/bindings/media/video-interfaces.txt
  22. Their connections are modeled using the OF graph bindings specified in
  23. Documentation/devicetree/bindings/graph.txt.
  24. - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
  25. - video port 1 for either a panel or subsequent encoder
  26. the lvds panel described by
  27. Documentation/devicetree/bindings/display/panel/simple-panel.txt
  28. Panel required properties:
  29. - ports for remote LVDS output
  30. Panel optional properties:
  31. - data-mapping: should be "vesa-24","jeida-24" or "jeida-18".
  32. This describes decribed by:
  33. Documentation/devicetree/bindings/display/panel/panel-lvds.txt
  34. Example:
  35. lvds_panel: lvds-panel {
  36. compatible = "auo,b101ean01";
  37. enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
  38. data-mapping = "jeida-24";
  39. ports {
  40. panel_in_lvds: endpoint {
  41. remote-endpoint = <&lvds_out_panel>;
  42. };
  43. };
  44. };
  45. For Rockchip RK3288:
  46. lvds: lvds@ff96c000 {
  47. compatible = "rockchip,rk3288-lvds";
  48. rockchip,grf = <&grf>;
  49. reg = <0xff96c000 0x4000>;
  50. clocks = <&cru PCLK_LVDS_PHY>;
  51. clock-names = "pclk_lvds";
  52. pinctrl-names = "lcdc";
  53. pinctrl-0 = <&lcdc_ctl>;
  54. avdd1v0-supply = <&vdd10_lcd>;
  55. avdd1v8-supply = <&vcc18_lcd>;
  56. avdd3v3-supply = <&vcca_33>;
  57. rockchip,output = "rgb";
  58. ports {
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. lvds_in: port@0 {
  62. reg = <0>;
  63. lvds_in_vopb: endpoint@0 {
  64. reg = <0>;
  65. remote-endpoint = <&vopb_out_lvds>;
  66. };
  67. lvds_in_vopl: endpoint@1 {
  68. reg = <1>;
  69. remote-endpoint = <&vopl_out_lvds>;
  70. };
  71. };
  72. lvds_out: port@1 {
  73. reg = <1>;
  74. lvds_out_panel: endpoint {
  75. remote-endpoint = <&panel_in_lvds>;
  76. };
  77. };
  78. };
  79. };