snps,dw-axi-dmac.txt 1.4 KB

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  1. Synopsys DesignWare AXI DMA Controller
  2. Required properties:
  3. - compatible: "snps,axi-dma-1.01a"
  4. - reg: Address range of the DMAC registers. This should include
  5. all of the per-channel registers.
  6. - interrupt: Should contain the DMAC interrupt number.
  7. - dma-channels: Number of channels supported by hardware.
  8. - snps,dma-masters: Number of AXI masters supported by the hardware.
  9. - snps,data-width: Maximum AXI data width supported by hardware.
  10. (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
  11. - snps,priority: Priority of channel. Array size is equal to the number of
  12. dma-channels. Priority value must be programmed within [0:dma-channels-1]
  13. range. (0 - minimum priority)
  14. - snps,block-size: Maximum block size supported by the controller channel.
  15. Array size is equal to the number of dma-channels.
  16. Optional properties:
  17. - snps,axi-max-burst-len: Restrict master AXI burst length by value specified
  18. in this property. If this property is missing the maximum AXI burst length
  19. supported by DMAC is used. [1:256]
  20. Example:
  21. dmac: dma-controller@80000 {
  22. compatible = "snps,axi-dma-1.01a";
  23. reg = <0x80000 0x400>;
  24. clocks = <&core_clk>, <&cfgr_clk>;
  25. clock-names = "core-clk", "cfgr-clk";
  26. interrupt-parent = <&intc>;
  27. interrupts = <27>;
  28. dma-channels = <4>;
  29. snps,dma-masters = <2>;
  30. snps,data-width = <3>;
  31. snps,block-size = <4096 4096 4096 4096>;
  32. snps,priority = <0 1 2 3>;
  33. snps,axi-max-burst-len = <16>;
  34. };