st_fdma.txt 2.7 KB

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  1. * STMicroelectronics Flexible Direct Memory Access Device Tree bindings
  2. The FDMA is a general-purpose direct memory access controller capable of
  3. supporting 16 independent DMA channels. It accepts up to 32 DMA requests.
  4. The FDMA is based on a Slim processor which requires a firmware.
  5. * FDMA Controller
  6. Required properties:
  7. - compatible : Should be one of
  8. - st,stih407-fdma-mpe31-11, "st,slim-rproc";
  9. - st,stih407-fdma-mpe31-12, "st,slim-rproc";
  10. - st,stih407-fdma-mpe31-13, "st,slim-rproc";
  11. - reg : Should contain an entry for each name in reg-names
  12. - reg-names : Must contain "slimcore", "dmem", "peripherals", "imem" entries
  13. - interrupts : Should contain one interrupt shared by all channels
  14. - dma-channels : Number of channels supported by the controller
  15. - #dma-cells : Must be <3>. See DMA client section below
  16. - clocks : Must contain an entry for each clock
  17. See: Documentation/devicetree/bindings/clock/clock-bindings.txt
  18. Example:
  19. fdma0: dma-controller@8e20000 {
  20. compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
  21. reg = <0x8e20000 0x8000>,
  22. <0x8e30000 0x3000>,
  23. <0x8e37000 0x1000>,
  24. <0x8e38000 0x8000>;
  25. reg-names = "slimcore", "dmem", "peripherals", "imem";
  26. clocks = <&clk_s_c0_flexgen CLK_FDMA>,
  27. <&clk_s_c0_flexgen CLK_EXT2F_A9>,
  28. <&clk_s_c0_flexgen CLK_EXT2F_A9>,
  29. <&clk_s_c0_flexgen CLK_EXT2F_A9>;
  30. interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>;
  31. dma-channels = <16>;
  32. #dma-cells = <3>;
  33. };
  34. * DMA client
  35. Required properties:
  36. - dmas: Comma separated list of dma channel requests
  37. - dma-names: Names of the aforementioned requested channels
  38. Each dmas request consists of 4 cells:
  39. 1. A phandle pointing to the FDMA controller
  40. 2. The request line number
  41. 3. A 32bit mask specifying (see include/linux/platform_data/dma-st-fdma.h)
  42. -bit 2-0: Holdoff value, dreq will be masked for
  43. 0x0: 0-0.5us
  44. 0x1: 0.5-1us
  45. 0x2: 1-1.5us
  46. -bit 17: data swap
  47. 0x0: disabled
  48. 0x1: enabled
  49. -bit 21: Increment Address
  50. 0x0: no address increment between transfers
  51. 0x1: increment address between transfers
  52. -bit 22: 2 STBus Initiator Coprocessor interface
  53. 0x0: high priority port
  54. 0x1: low priority port
  55. 4. transfers type
  56. 0 free running
  57. 1 paced
  58. Example:
  59. sti_uni_player2: sti-uni-player@2 {
  60. compatible = "st,sti-uni-player";
  61. #sound-dai-cells = <0>;
  62. st,syscfg = <&syscfg_core>;
  63. clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
  64. assigned-clocks = <&clk_s_d0_flexgen CLK_PCM_2>;
  65. assigned-clock-parents = <&clk_s_d0_quadfs 2>;
  66. assigned-clock-rates = <50000000>;
  67. reg = <0x8D82000 0x158>;
  68. interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
  69. dmas = <&fdma0 4 0 1>;
  70. dai-name = "Uni Player #1 (DAC)";
  71. dma-names = "tx";
  72. st,uniperiph-id = <2>;
  73. st,version = <5>;
  74. st,mode = "PCM";
  75. };