sun6i-dma.txt 2.3 KB

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  1. Allwinner A31 DMA Controller
  2. This driver follows the generic DMA bindings defined in dma.txt.
  3. Required properties:
  4. - compatible: Must be one of
  5. "allwinner,sun6i-a31-dma"
  6. "allwinner,sun8i-a23-dma"
  7. "allwinner,sun8i-a83t-dma"
  8. "allwinner,sun8i-h3-dma"
  9. "allwinner,sun8i-v3s-dma"
  10. - reg: Should contain the registers base address and length
  11. - interrupts: Should contain a reference to the interrupt used by this device
  12. - clocks: Should contain a reference to the parent AHB clock
  13. - resets: Should contain a reference to the reset controller asserting
  14. this device in reset
  15. - #dma-cells : Should be 1, a single cell holding a line request number
  16. Example:
  17. dma: dma-controller@1c02000 {
  18. compatible = "allwinner,sun6i-a31-dma";
  19. reg = <0x01c02000 0x1000>;
  20. interrupts = <0 50 4>;
  21. clocks = <&ahb1_gates 6>;
  22. resets = <&ahb1_rst 6>;
  23. #dma-cells = <1>;
  24. };
  25. ------------------------------------------------------------------------------
  26. For A64 DMA controller:
  27. Required properties:
  28. - compatible: "allwinner,sun50i-a64-dma"
  29. - dma-channels: Number of DMA channels supported by the controller.
  30. Refer to Documentation/devicetree/bindings/dma/dma.txt
  31. - all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells
  32. Optional properties:
  33. - dma-requests: Number of DMA request signals supported by the controller.
  34. Refer to Documentation/devicetree/bindings/dma/dma.txt
  35. Example:
  36. dma: dma-controller@1c02000 {
  37. compatible = "allwinner,sun50i-a64-dma";
  38. reg = <0x01c02000 0x1000>;
  39. interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  40. clocks = <&ccu CLK_BUS_DMA>;
  41. dma-channels = <8>;
  42. dma-requests = <27>;
  43. resets = <&ccu RST_BUS_DMA>;
  44. #dma-cells = <1>;
  45. };
  46. ------------------------------------------------------------------------------
  47. Clients:
  48. DMA clients connected to the A31 DMA controller must use the format
  49. described in the dma.txt file, using a two-cell specifier for each
  50. channel: a phandle plus one integer cells.
  51. The two cells in order are:
  52. 1. A phandle pointing to the DMA controller.
  53. 2. The port ID as specified in the datasheet
  54. Example:
  55. spi2: spi@1c6a000 {
  56. compatible = "allwinner,sun6i-a31-spi";
  57. reg = <0x01c6a000 0x1000>;
  58. interrupts = <0 67 4>;
  59. clocks = <&ahb1_gates 22>, <&spi2_clk>;
  60. clock-names = "ahb", "mod";
  61. dmas = <&dma 25>, <&dma 25>;
  62. dma-names = "rx", "tx";
  63. resets = <&ahb1_rst 22>;
  64. };