altera-hps2fpga-bridge.txt 1.1 KB

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  1. Altera FPGA/HPS Bridge Driver
  2. Required properties:
  3. - regs : base address and size for AXI bridge module
  4. - compatible : Should contain one of:
  5. "altr,socfpga-lwhps2fpga-bridge",
  6. "altr,socfpga-hps2fpga-bridge", or
  7. "altr,socfpga-fpga2hps-bridge"
  8. - resets : Phandle and reset specifier for this bridge's reset
  9. - clocks : Clocks used by this module.
  10. Optional properties:
  11. - bridge-enable : 0 if driver should disable bridge at startup.
  12. 1 if driver should enable bridge at startup.
  13. Default is to leave bridge in its current state.
  14. Example:
  15. fpga_bridge0: fpga-bridge@ff400000 {
  16. compatible = "altr,socfpga-lwhps2fpga-bridge";
  17. reg = <0xff400000 0x100000>;
  18. resets = <&rst LWHPS2FPGA_RESET>;
  19. clocks = <&l4_main_clk>;
  20. bridge-enable = <0>;
  21. };
  22. fpga_bridge1: fpga-bridge@ff500000 {
  23. compatible = "altr,socfpga-hps2fpga-bridge";
  24. reg = <0xff500000 0x10000>;
  25. resets = <&rst HPS2FPGA_RESET>;
  26. clocks = <&l4_main_clk>;
  27. bridge-enable = <1>;
  28. };
  29. fpga_bridge2: fpga-bridge@ff600000 {
  30. compatible = "altr,socfpga-fpga2hps-bridge";
  31. reg = <0xff600000 0x100000>;
  32. resets = <&rst FPGA2HPS_RESET>;
  33. clocks = <&l4_main_clk>;
  34. };