gpio-eic-sprd.txt 3.3 KB

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  1. Spreadtrum EIC controller bindings
  2. The EIC is the abbreviation of external interrupt controller, which can
  3. be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
  4. one is in digital chip, and another one is in PMIC. The digital chip EIC
  5. controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
  6. EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
  7. module.
  8. The EIC-debounce sub-module provides up to 8 source input signal
  9. connections. A debounce mechanism is used to capture the input signals'
  10. stable status (millisecond resolution) and a single-trigger mechanism
  11. is introduced into this sub-module to enhance the input event detection
  12. reliability. In addition, this sub-module's clock can be shut off
  13. automatically to reduce power dissipation. Moreover the debounce range
  14. is from 1ms to 4s with a step size of 1ms. The input signal will be
  15. ignored if it is asserted for less than 1 ms.
  16. The EIC-latch sub-module is used to latch some special power down signals
  17. and generate interrupts, since the EIC-latch does not depend on the APB
  18. clock to capture signals.
  19. The EIC-async sub-module uses a 32kHz clock to capture the short signals
  20. (microsecond resolution) to generate interrupts by level or edge trigger.
  21. The EIC-sync is similar with GPIO's input function, which is a synchronized
  22. signal input register. It can generate interrupts by level or edge trigger
  23. when detecting input signals.
  24. Required properties:
  25. - compatible: Should be one of the following:
  26. "sprd,sc9860-eic-debounce",
  27. "sprd,sc9860-eic-latch",
  28. "sprd,sc9860-eic-async",
  29. "sprd,sc9860-eic-sync",
  30. "sprd,sc27xx-eic".
  31. - reg: Define the base and range of the I/O address space containing
  32. the GPIO controller registers.
  33. - gpio-controller: Marks the device node as a GPIO controller.
  34. - #gpio-cells: Should be <2>. The first cell is the gpio number and
  35. the second cell is used to specify optional parameters.
  36. - interrupt-controller: Marks the device node as an interrupt controller.
  37. - #interrupt-cells: Should be <2>. Specifies the number of cells needed
  38. to encode interrupt source.
  39. - interrupts: Should be the port interrupt shared by all the gpios.
  40. Example:
  41. eic_debounce: gpio@40210000 {
  42. compatible = "sprd,sc9860-eic-debounce";
  43. reg = <0 0x40210000 0 0x80>;
  44. gpio-controller;
  45. #gpio-cells = <2>;
  46. interrupt-controller;
  47. #interrupt-cells = <2>;
  48. interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  49. };
  50. eic_latch: gpio@40210080 {
  51. compatible = "sprd,sc9860-eic-latch";
  52. reg = <0 0x40210080 0 0x20>;
  53. gpio-controller;
  54. #gpio-cells = <2>;
  55. interrupt-controller;
  56. #interrupt-cells = <2>;
  57. interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  58. };
  59. eic_async: gpio@402100a0 {
  60. compatible = "sprd,sc9860-eic-async";
  61. reg = <0 0x402100a0 0 0x20>;
  62. gpio-controller;
  63. #gpio-cells = <2>;
  64. interrupt-controller;
  65. #interrupt-cells = <2>;
  66. interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  67. };
  68. eic_sync: gpio@402100c0 {
  69. compatible = "sprd,sc9860-eic-sync";
  70. reg = <0 0x402100c0 0 0x20>;
  71. gpio-controller;
  72. #gpio-cells = <2>;
  73. interrupt-controller;
  74. #interrupt-cells = <2>;
  75. interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  76. };
  77. pmic_eic: gpio@300 {
  78. compatible = "sprd,sc27xx-eic";
  79. reg = <0x300>;
  80. interrupt-parent = <&sc2731_pmic>;
  81. interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
  82. gpio-controller;
  83. #gpio-cells = <2>;
  84. interrupt-controller;
  85. #interrupt-cells = <2>;
  86. };