mrvl-gpio.txt 1.6 KB

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  1. * Marvell PXA GPIO controller
  2. Required properties:
  3. - compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio",
  4. "intel,pxa27x-gpio", "intel,pxa3xx-gpio",
  5. "marvell,pxa93x-gpio", "marvell,mmp-gpio",
  6. "marvell,mmp2-gpio" or marvell,pxa1928-gpio.
  7. - reg : Address and length of the register set for the device
  8. - interrupts : Should be the port interrupt shared by all gpio pins.
  9. There're three gpio interrupts in arch-pxa, and they're gpio0,
  10. gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
  11. gpio_mux.
  12. - interrupt-names : Should be the names of irq resources. Each interrupt
  13. uses its own interrupt name, so there should be as many interrupt names
  14. as referenced interrupts.
  15. - interrupt-controller : Identifies the node as an interrupt controller.
  16. - #interrupt-cells: Specifies the number of cells needed to encode an
  17. interrupt source.
  18. - gpio-controller : Marks the device node as a gpio controller.
  19. - #gpio-cells : Should be two. The first cell is the pin number and
  20. the second cell is used to specify flags. See gpio.txt for possible
  21. values.
  22. Example for a MMP platform:
  23. gpio: gpio@d4019000 {
  24. compatible = "marvell,mmp-gpio";
  25. reg = <0xd4019000 0x1000>;
  26. interrupts = <49>;
  27. interrupt-names = "gpio_mux";
  28. gpio-controller;
  29. #gpio-cells = <2>;
  30. interrupt-controller;
  31. #interrupt-cells = <1>;
  32. };
  33. Example for a PXA3xx platform:
  34. gpio: gpio@40e00000 {
  35. compatible = "intel,pxa3xx-gpio";
  36. reg = <0x40e00000 0x10000>;
  37. interrupt-names = "gpio0", "gpio1", "gpio_mux";
  38. interrupts = <8 9 10>;
  39. gpio-controller;
  40. #gpio-cells = <0x2>;
  41. interrupt-controller;
  42. #interrupt-cells = <0x2>;
  43. };