mscc,ocelot-icpu-intr.txt 678 B

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  1. Microsemi Ocelot SoC ICPU Interrupt Controller
  2. Required properties:
  3. - compatible : should be "mscc,ocelot-icpu-intr"
  4. - reg : Specifies base physical address and size of the registers.
  5. - interrupt-controller : Identifies the node as an interrupt controller
  6. - #interrupt-cells : Specifies the number of cells needed to encode an
  7. interrupt source. The value shall be 1.
  8. - interrupts : Specifies the CPU interrupt the controller is connected to.
  9. Example:
  10. intc: interrupt-controller@70000070 {
  11. compatible = "mscc,ocelot-icpu-intr";
  12. reg = <0x70000070 0x70>;
  13. #interrupt-cells = <1>;
  14. interrupt-controller;
  15. interrupt-parent = <&cpuintc>;
  16. interrupts = <2>;
  17. };