cib.txt 1.1 KB

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  1. * Cavium Interrupt Bus widget
  2. Properties:
  3. - compatible: "cavium,octeon-7130-cib"
  4. Compatibility with cn70XX SoCs.
  5. - interrupt-controller: This is an interrupt controller.
  6. - reg: Two elements consisting of the addresses of the RAW and EN
  7. registers of the CIB block
  8. - cavium,max-bits: The index (zero based) of the highest numbered bit
  9. in the CIB block.
  10. - interrupts: The CIU line to which the CIB block is connected.
  11. - #interrupt-cells: Must be <2>. The first cell is the bit within the
  12. CIB. The second cell specifies the triggering semantics of the
  13. line.
  14. Example:
  15. interrupt-controller@107000000e000 {
  16. compatible = "cavium,octeon-7130-cib";
  17. reg = <0x10700 0x0000e000 0x0 0x8>, /* RAW */
  18. <0x10700 0x0000e100 0x0 0x8>; /* EN */
  19. cavium,max-bits = <23>;
  20. interrupt-controller;
  21. interrupt-parent = <&ciu>;
  22. interrupts = <1 24>;
  23. /* Interrupts are specified by two parts:
  24. * 1) Bit number in the CIB* registers
  25. * 2) Triggering (1 - edge rising
  26. * 2 - edge falling
  27. * 4 - level active high
  28. * 8 - level active low)
  29. */
  30. #interrupt-cells = <2>;
  31. };