fsl-esdhc.txt 1.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
  1. * Freescale Enhanced Secure Digital Host Controller (eSDHC)
  2. The Enhanced Secure Digital Host Controller provides an interface
  3. for MMC, SD, and SDIO types of memory cards.
  4. This file documents differences between the core properties described
  5. by mmc.txt and the properties used by the sdhci-esdhc driver.
  6. Required properties:
  7. - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
  8. Possible compatibles for PowerPC:
  9. "fsl,mpc8536-esdhc"
  10. "fsl,mpc8378-esdhc"
  11. "fsl,p2020-esdhc"
  12. "fsl,p4080-esdhc"
  13. "fsl,t1040-esdhc"
  14. "fsl,t4240-esdhc"
  15. Possible compatibles for ARM:
  16. "fsl,ls1012a-esdhc"
  17. "fsl,ls1088a-esdhc"
  18. "fsl,ls1043a-esdhc"
  19. "fsl,ls1046a-esdhc"
  20. "fsl,ls2080a-esdhc"
  21. - clock-frequency : specifies eSDHC base clock frequency.
  22. Optional properties:
  23. - sdhci,wp-inverted : specifies that eSDHC controller reports
  24. inverted write-protect state; New devices should use the generic
  25. "wp-inverted" property.
  26. - sdhci,1-bit-only : specifies that a controller can only handle
  27. 1-bit data transfers. New devices should use the generic
  28. "bus-width = <1>" property.
  29. - sdhci,auto-cmd12: specifies that a controller can only handle auto
  30. CMD12.
  31. - voltage-ranges : two cells are required, first cell specifies minimum
  32. slot voltage (mV), second cell specifies maximum slot voltage (mV).
  33. Several ranges could be specified.
  34. - little-endian : If the host controller is little-endian mode, specify
  35. this property. The default endian mode is big-endian.
  36. Example:
  37. sdhci@2e000 {
  38. compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
  39. reg = <0x2e000 0x1000>;
  40. interrupts = <42 0x8>;
  41. interrupt-parent = <&ipic>;
  42. /* Filled in by U-Boot */
  43. clock-frequency = <0>;
  44. voltage-ranges = <3300 3300>;
  45. };