sdhci-st.txt 3.6 KB

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  1. * STMicroelectronics sdhci-st MMC/SD controller
  2. This file documents the differences between the core properties in
  3. Documentation/devicetree/bindings/mmc/mmc.txt and the properties
  4. used by the sdhci-st driver.
  5. Required properties:
  6. - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
  7. to set the internal glue logic used for configuring the MMC
  8. subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
  9. family).
  10. - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
  11. See: Documentation/devicetree/bindings/resource-names.txt
  12. - clocks: Phandle to the clock.
  13. See: Documentation/devicetree/bindings/clock/clock-bindings.txt
  14. - interrupts: One mmc interrupt should be described here.
  15. - interrupt-names: Should be "mmcirq".
  16. - pinctrl-names: A pinctrl state names "default" must be defined.
  17. - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
  18. See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
  19. - reg: This must provide the host controller base address and it can also
  20. contain the FlashSS Top register for TX/RX delay used by the driver
  21. to configure DLL inside the flashSS, if so reg-names must also be
  22. specified.
  23. Optional properties:
  24. - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
  25. for eMMC on stih407 family silicon to configure DLL inside FlashSS.
  26. - non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
  27. family.
  28. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  29. - bus-width: Number of data lines.
  30. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  31. - max-frequency: Can be 200MHz, 100MHz or 50MHz (default) and used for
  32. configuring the CCONFIG3 in the mmcss.
  33. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  34. - resets: Phandle and reset specifier pair to softreset line of HC IP.
  35. See: Documentation/devicetree/bindings/reset/reset.txt
  36. - vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
  37. supply in eMMC/SD specs.
  38. - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
  39. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  40. - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
  41. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  42. - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
  43. See: Documentation/devicetree/bindings/mmc/mmc.txt.
  44. Example:
  45. /* Example stih416e eMMC configuration */
  46. mmc0: sdhci@fe81e000 {
  47. compatible = "st,sdhci";
  48. reg = <0xfe81e000 0x1000>;
  49. interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
  50. interrupt-names = "mmcirq";
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&pinctrl_mmc0>;
  53. clock-names = "mmc";
  54. clocks = <&clk_s_a1_ls 1>;
  55. bus-width = <8>
  56. /* Example SD stih407 family configuration */
  57. mmc1: sdhci@9080000 {
  58. compatible = "st,sdhci-stih407", "st,sdhci";
  59. reg = <0x09080000 0x7ff>;
  60. reg-names = "mmc";
  61. interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
  62. interrupt-names = "mmcirq";
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&pinctrl_sd1>;
  65. clock-names = "mmc";
  66. clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
  67. resets = <&softreset STIH407_MMC1_SOFTRESET>;
  68. bus-width = <4>;
  69. };
  70. /* Example eMMC stih407 family configuration */
  71. mmc0: sdhci@9060000 {
  72. compatible = "st,sdhci-stih407", "st,sdhci";
  73. reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
  74. reg-names = "mmc", "top-mmc-delay";
  75. interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
  76. interrupt-names = "mmcirq";
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&pinctrl_mmc0>;
  79. clock-names = "mmc";
  80. clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
  81. vqmmc-supply = <&vmmc_reg>;
  82. max-frequency = <200000000>;
  83. bus-width = <8>;
  84. non-removable;
  85. sd-uhs-sdr50;
  86. sd-uhs-sdr104;
  87. sd-uhs-ddr50;
  88. };