mtd-physmap.txt 3.3 KB

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  1. CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
  2. Flash chips (Memory Technology Devices) are often used for solid state
  3. file systems on embedded devices.
  4. - compatible : should contain the specific model of mtd chip(s)
  5. used, if known, followed by either "cfi-flash", "jedec-flash",
  6. "mtd-ram" or "mtd-rom".
  7. - reg : Address range(s) of the mtd chip(s)
  8. It's possible to (optionally) define multiple "reg" tuples so that
  9. non-identical chips can be described in one node.
  10. - bank-width : Width (in bytes) of the bank. Equal to the
  11. device width times the number of interleaved chips.
  12. - device-width : (optional) Width of a single mtd chip. If
  13. omitted, assumed to be equal to 'bank-width'.
  14. - #address-cells, #size-cells : Must be present if the device has
  15. sub-nodes representing partitions (see below). In this case
  16. both #address-cells and #size-cells must be equal to 1.
  17. - no-unaligned-direct-access: boolean to disable the default direct
  18. mapping of the flash.
  19. On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
  20. problems with JFFS2 usage, as the local bus (LPB) doesn't support
  21. unaligned accesses as implemented in the JFFS2 code via memcpy().
  22. By defining "no-unaligned-direct-access", the flash will not be
  23. exposed directly to the MTD users (e.g. JFFS2) any more.
  24. - linux,mtd-name: allow to specify the mtd name for retro capability with
  25. physmap-flash drivers as boot loader pass the mtd partition via the old
  26. device name physmap-flash.
  27. - use-advanced-sector-protection: boolean to enable support for the
  28. advanced sector protection (Spansion: PPB - Persistent Protection
  29. Bits) locking.
  30. For JEDEC compatible devices, the following additional properties
  31. are defined:
  32. - vendor-id : Contains the flash chip's vendor id (1 byte).
  33. - device-id : Contains the flash chip's device id (1 byte).
  34. For ROM compatible devices (and ROM fallback from cfi-flash), the following
  35. additional (optional) property is defined:
  36. - erase-size : The chip's physical erase block size in bytes.
  37. The device tree may optionally contain endianness property.
  38. little-endian or big-endian : It Represents the endianness that should be used
  39. by the controller to properly read/write data
  40. from/to the flash. If this property is missing,
  41. the endianness is chosen by the system
  42. (potentially based on extra configuration options).
  43. The device tree may optionally contain sub-nodes describing partitions of the
  44. address space. See partition.txt for more detail.
  45. Example:
  46. flash@ff000000 {
  47. compatible = "amd,am29lv128ml", "cfi-flash";
  48. reg = <ff000000 01000000>;
  49. bank-width = <4>;
  50. device-width = <1>;
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. fs@0 {
  54. label = "fs";
  55. reg = <0 f80000>;
  56. };
  57. firmware@f80000 {
  58. label ="firmware";
  59. reg = <f80000 80000>;
  60. read-only;
  61. };
  62. };
  63. Here an example with multiple "reg" tuples:
  64. flash@f0000000,0 {
  65. #address-cells = <1>;
  66. #size-cells = <1>;
  67. compatible = "intel,PC48F4400P0VB", "cfi-flash";
  68. reg = <0 0x00000000 0x02000000
  69. 0 0x02000000 0x02000000>;
  70. bank-width = <2>;
  71. partition@0 {
  72. label = "test-part1";
  73. reg = <0 0x04000000>;
  74. };
  75. };
  76. An example using SRAM:
  77. sram@2,0 {
  78. compatible = "samsung,k6f1616u6a", "mtd-ram";
  79. reg = <2 0 0x00200000>;
  80. bank-width = <2>;
  81. };