amd-xgbe.txt 2.9 KB

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  1. * AMD 10GbE driver (amd-xgbe)
  2. Required properties:
  3. - compatible: Should be "amd,xgbe-seattle-v1a"
  4. - reg: Address and length of the register sets for the device
  5. - MAC registers
  6. - PCS registers
  7. - SerDes Rx/Tx registers
  8. - SerDes integration registers (1/2)
  9. - SerDes integration registers (2/2)
  10. - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
  11. listed is required and is the general device interrupt. If the optional
  12. amd,per-channel-interrupt property is specified, then one additional
  13. interrupt for each DMA channel supported by the device should be specified.
  14. The last interrupt listed should be the PCS auto-negotiation interrupt.
  15. - clocks:
  16. - DMA clock for the amd-xgbe device (used for calculating the
  17. correct Rx interrupt watchdog timer value on a DMA channel
  18. for coalescing)
  19. - PTP clock for the amd-xgbe device
  20. - clock-names: Should be the names of the clocks
  21. - "dma_clk" for the DMA clock
  22. - "ptp_clk" for the PTP clock
  23. - phy-mode: See ethernet.txt file in the same directory
  24. Optional properties:
  25. - mac-address: mac address to be assigned to the device. Can be overridden
  26. by UEFI.
  27. - dma-coherent: Present if dma operations are coherent
  28. - amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate
  29. a unique interrupt for each DMA channel - this requires an additional
  30. interrupt be configured for each DMA channel
  31. - amd,speed-set: Speed capabilities of the device
  32. 0 - 1GbE and 10GbE (default)
  33. 1 - 2.5GbE and 10GbE
  34. The following optional properties are represented by an array with each
  35. value corresponding to a particular speed. The first array value represents
  36. the setting for the 1GbE speed, the second value for the 2.5GbE speed and
  37. the third value for the 10GbE speed. All three values are required if the
  38. property is used.
  39. - amd,serdes-blwc: Baseline wandering correction enablement
  40. 0 - Off
  41. 1 - On
  42. - amd,serdes-cdr-rate: CDR rate speed selection
  43. - amd,serdes-pq-skew: PQ (data sampling) skew
  44. - amd,serdes-tx-amp: TX amplitude boost
  45. - amd,serdes-dfe-tap-config: DFE taps available to run
  46. - amd,serdes-dfe-tap-enable: DFE taps to enable
  47. Example:
  48. xgbe@e0700000 {
  49. compatible = "amd,xgbe-seattle-v1a";
  50. reg = <0 0xe0700000 0 0x80000>,
  51. <0 0xe0780000 0 0x80000>,
  52. <0 0xe1240800 0 0x00400>,
  53. <0 0xe1250000 0 0x00060>,
  54. <0 0xe1250080 0 0x00004>;
  55. interrupt-parent = <&gic>;
  56. interrupts = <0 325 4>,
  57. <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,
  58. <0 323 4>;
  59. amd,per-channel-interrupt;
  60. clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
  61. clock-names = "dma_clk", "ptp_clk";
  62. phy-mode = "xgmii";
  63. mac-address = [ 02 a1 a2 a3 a4 a5 ];
  64. amd,speed-set = <0>;
  65. amd,serdes-blwc = <1>, <1>, <0>;
  66. amd,serdes-cdr-rate = <2>, <2>, <7>;
  67. amd,serdes-pq-skew = <10>, <10>, <30>;
  68. amd,serdes-tx-amp = <15>, <15>, <10>;
  69. amd,serdes-dfe-tap-config = <3>, <3>, <1>;
  70. amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
  71. };