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- * Microchip ENC28J60
- This is a standalone 10 MBit ethernet controller with SPI interface.
- For each device connected to a SPI bus, define a child node within
- the SPI master node.
- Required properties:
- - compatible: Should be "microchip,enc28j60"
- - reg: Specify the SPI chip select the ENC28J60 is wired to
- - interrupts: Specify the interrupt index within the interrupt controller (referred
- to above in interrupt-parent) and interrupt type. The ENC28J60 natively
- generates falling edge interrupts, however, additional board logic
- might invert the signal.
- - pinctrl-names: List of assigned state names, see pinctrl binding documentation.
- - pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
- see also generic and your platform specific pinctrl binding
- documentation.
- Optional properties:
- - spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
- According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
- board designs may need to limit this value.
- - local-mac-address: See ethernet.txt in the same directory.
- Example (for NXP i.MX28 with pin control stuff for GPIO irq):
- ssp2: ssp@80014000 {
- compatible = "fsl,imx28-spi";
- pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
- enc28j60: ethernet@0 {
- compatible = "microchip,enc28j60";
- pinctrl-names = "default";
- pinctrl-0 = <&enc28j60_pins>;
- reg = <0>;
- interrupt-parent = <&gpio3>;
- interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
- spi-max-frequency = <12000000>;
- };
- };
- pinctrl@80018000 {
- enc28j60_pins: enc28j60_pins@0 {
- reg = <0>;
- fsl,pinmux-ids = <
- MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
- >;
- fsl,drive-strength = <MXS_DRIVE_4mA>;
- fsl,voltage = <MXS_VOLTAGE_HIGH>;
- fsl,pull-up = <MXS_PULL_DISABLE>;
- };
- };
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