sh_eth.txt 2.9 KB

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  1. * Renesas Electronics SH EtherMAC
  2. This file provides information on what the device node for the SH EtherMAC
  3. interface contains.
  4. Required properties:
  5. - compatible: Must contain one or more of the following:
  6. "renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
  7. "renesas,ether-r8a7743" if the device is a part of R8A7743 SoC.
  8. "renesas,ether-r8a7745" if the device is a part of R8A7745 SoC.
  9. "renesas,ether-r8a7778" if the device is a part of R8A7778 SoC.
  10. "renesas,ether-r8a7779" if the device is a part of R8A7779 SoC.
  11. "renesas,ether-r8a7790" if the device is a part of R8A7790 SoC.
  12. "renesas,ether-r8a7791" if the device is a part of R8A7791 SoC.
  13. "renesas,ether-r8a7793" if the device is a part of R8A7793 SoC.
  14. "renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
  15. "renesas,gether-r8a77980" if the device is a part of R8A77980 SoC.
  16. "renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
  17. "renesas,ether-r7s9210" if the device is a part of R7S9210 SoC.
  18. "renesas,rcar-gen1-ether" for a generic R-Car Gen1 device.
  19. "renesas,rcar-gen2-ether" for a generic R-Car Gen2 or RZ/G1
  20. device.
  21. When compatible with the generic version, nodes must list
  22. the SoC-specific version corresponding to the platform
  23. first followed by the generic version.
  24. - reg: offset and length of (1) the E-DMAC/feLic register block (required),
  25. (2) the TSU register block (optional).
  26. - interrupts: interrupt specifier for the sole interrupt.
  27. - phy-mode: see ethernet.txt file in the same directory.
  28. - phy-handle: see ethernet.txt file in the same directory.
  29. - #address-cells: number of address cells for the MDIO bus, must be equal to 1.
  30. - #size-cells: number of size cells on the MDIO bus, must be equal to 0.
  31. - clocks: clock phandle and specifier pair.
  32. - pinctrl-0: phandle, referring to a default pin configuration node.
  33. Optional properties:
  34. - pinctrl-names: pin configuration state name ("default").
  35. - renesas,no-ether-link: boolean, specify when a board does not provide a proper
  36. Ether LINK signal.
  37. - renesas,ether-link-active-low: boolean, specify when the Ether LINK signal is
  38. active-low instead of normal active-high.
  39. Example (Lager board):
  40. ethernet@ee700000 {
  41. compatible = "renesas,ether-r8a7790",
  42. "renesas,rcar-gen2-ether";
  43. reg = <0 0xee700000 0 0x400>;
  44. interrupt-parent = <&gic>;
  45. interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
  46. clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
  47. phy-mode = "rmii";
  48. phy-handle = <&phy1>;
  49. pinctrl-0 = <&ether_pins>;
  50. pinctrl-names = "default";
  51. renesas,ether-link-active-low;
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. phy1: ethernet-phy@1 {
  55. reg = <1>;
  56. interrupt-parent = <&irqc0>;
  57. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  58. pinctrl-0 = <&phy1_pins>;
  59. pinctrl-names = "default";
  60. };
  61. };