altera-pcie.txt 1.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748
  1. * Altera PCIe controller
  2. Required properties:
  3. - compatible : should contain "altr,pcie-root-port-1.0"
  4. - reg: a list of physical base address and length for TXS and CRA.
  5. - reg-names: must include the following entries:
  6. "Txs": TX slave port region
  7. "Cra": Control register access region
  8. - interrupts: specifies the interrupt source of the parent interrupt
  9. controller. The format of the interrupt specifier depends
  10. on the parent interrupt controller.
  11. - device_type: must be "pci"
  12. - #address-cells: set to <3>
  13. - #size-cells: set to <2>
  14. - #interrupt-cells: set to <1>
  15. - ranges: describes the translation of addresses for root ports and
  16. standard PCI regions.
  17. - interrupt-map-mask and interrupt-map: standard PCI properties to define the
  18. mapping of the PCIe interface to interrupt numbers.
  19. Optional properties:
  20. - msi-parent: Link to the hardware entity that serves as the MSI controller
  21. for this PCIe controller.
  22. - bus-range: PCI bus numbers covered
  23. Example
  24. pcie_0: pcie@c00000000 {
  25. compatible = "altr,pcie-root-port-1.0";
  26. reg = <0xc0000000 0x20000000>,
  27. <0xff220000 0x00004000>;
  28. reg-names = "Txs", "Cra";
  29. interrupt-parent = <&hps_0_arm_gic_0>;
  30. interrupts = <0 40 4>;
  31. interrupt-controller;
  32. #interrupt-cells = <1>;
  33. bus-range = <0x0 0xFF>;
  34. device_type = "pci";
  35. msi-parent = <&msi_to_gic_gen_0>;
  36. #address-cells = <3>;
  37. #size-cells = <2>;
  38. interrupt-map-mask = <0 0 0 7>;
  39. interrupt-map = <0 0 0 1 &pcie_0 1>,
  40. <0 0 0 2 &pcie_0 2>,
  41. <0 0 0 3 &pcie_0 3>,
  42. <0 0 0 4 &pcie_0 4>;
  43. ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000
  44. 0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
  45. };