designware-pcie-ecam.txt 1.8 KB

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  1. * Synopsys DesignWare PCIe root complex in ECAM shift mode
  2. In some cases, firmware may already have configured the Synopsys DesignWare
  3. PCIe controller in RC mode with static ATU window mappings that cover all
  4. config, MMIO and I/O spaces in a [mostly] ECAM compatible fashion.
  5. In this case, there is no need for the OS to perform any low level setup
  6. of clocks, PHYs or device registers, nor is there any reason for the driver
  7. to reconfigure ATU windows for config and/or IO space accesses at runtime.
  8. In cases where the IP was synthesized with a minimum ATU window size of
  9. 64 KB, it cannot be supported by the generic ECAM driver, because it
  10. requires special config space accessors that filter accesses to device #1
  11. and beyond on the first bus.
  12. Required properties:
  13. - compatible: "marvell,armada8k-pcie-ecam" or
  14. "socionext,synquacer-pcie-ecam" or
  15. "snps,dw-pcie-ecam" (must be preceded by a more specific match)
  16. Please refer to the binding document of "pci-host-ecam-generic" in the
  17. file host-generic-pci.txt for a description of the remaining required
  18. and optional properties.
  19. Example:
  20. pcie1: pcie@7f000000 {
  21. compatible = "socionext,synquacer-pcie-ecam", "snps,dw-pcie-ecam";
  22. device_type = "pci";
  23. reg = <0x0 0x7f000000 0x0 0xf00000>;
  24. bus-range = <0x0 0xe>;
  25. #address-cells = <3>;
  26. #size-cells = <2>;
  27. ranges = <0x1000000 0x00 0x00010000 0x00 0x7ff00000 0x0 0x00010000>,
  28. <0x2000000 0x00 0x70000000 0x00 0x70000000 0x0 0x0f000000>,
  29. <0x3000000 0x3f 0x00000000 0x3f 0x00000000 0x1 0x00000000>;
  30. #interrupt-cells = <0x1>;
  31. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  32. interrupt-map = <0x0 0x0 0x0 0x0 &gic 0x0 0x0 0x0 182 0x4>;
  33. msi-map = <0x0 &its 0x0 0x10000>;
  34. dma-coherent;
  35. };