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- HiSilicon Hip05 and Hip06 PCIe host bridge DT description
- HiSilicon PCIe host controller is based on the Synopsys DesignWare PCI core.
- It shares common functions with the PCIe DesignWare core driver and inherits
- common properties defined in
- Documentation/devicetree/bindings/pci/designware-pcie.txt.
- Additional properties are described here:
- Required properties
- - compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie".
- - reg: Should contain rc_dbi, config registers location and length.
- - reg-names: Must include the following entries:
- "rc_dbi": controller configuration registers;
- "config": PCIe configuration space registers.
- - msi-parent: Should be its_pcie which is an ITS receiving MSI interrupts.
- - port-id: Should be 0, 1, 2 or 3.
- Optional properties:
- - status: Either "ok" or "disabled".
- - dma-coherent: Present if DMA operations are coherent.
- Hip05 Example (note that Hip06 is the same except compatible):
- pcie@b0080000 {
- compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
- reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;
- reg-names = "rc_dbi", "config";
- bus-range = <0 15>;
- msi-parent = <&its_pcie>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- dma-coherent;
- ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>;
- num-lanes = <8>;
- port-id = <1>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10
- 0x0 0 0 2 &mbigen_pcie 2 11
- 0x0 0 0 3 &mbigen_pcie 3 12
- 0x0 0 0 4 &mbigen_pcie 4 13>;
- };
- HiSilicon Hip06/Hip07 PCIe host bridge DT (almost-ECAM) description.
- Some BIOSes place the host controller in a mode where it is ECAM
- compliant for all devices other than the root complex. In such cases,
- the host controller should be described as below.
- The properties and their meanings are identical to those described in
- host-generic-pci.txt except as listed below.
- Properties of the host controller node that differ from
- host-generic-pci.txt:
- - compatible : Must be "hisilicon,hip06-pcie-ecam", or
- "hisilicon,hip07-pcie-ecam"
- - reg : Two entries: First the ECAM configuration space for any
- other bus underneath the root bus. Second, the base
- and size of the HiSilicon host bridge registers include
- the RC's own config space.
- Example:
- pcie0: pcie@a0090000 {
- compatible = "hisilicon,hip06-pcie-ecam";
- reg = <0 0xb0000000 0 0x2000000>, /* ECAM configuration space */
- <0 0xa0090000 0 0x10000>; /* host bridge registers */
- bus-range = <0 31>;
- msi-map = <0x0000 &its_dsa 0x0000 0x2000>;
- msi-map-mask = <0xffff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- dma-coherent;
- ranges = <0x02000000 0 0xb2000000 0x0 0xb2000000 0 0x5ff0000
- 0x01000000 0 0 0 0xb7ff0000 0 0x10000>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <0x0 0 0 1 &mbigen_pcie0 650 4
- 0x0 0 0 2 &mbigen_pcie0 650 4
- 0x0 0 0 3 &mbigen_pcie0 650 4
- 0x0 0 0 4 &mbigen_pcie0 650 4>;
- };
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