qcom-qusb2-phy.txt 2.6 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667
  1. Qualcomm QUSB2 phy controller
  2. =============================
  3. QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
  4. Required properties:
  5. - compatible: compatible list, contains
  6. "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996,
  7. "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
  8. - reg: offset and length of the PHY register set.
  9. - #phy-cells: must be 0.
  10. - clocks: a list of phandles and clock-specifier pairs,
  11. one for each entry in clock-names.
  12. - clock-names: must be "cfg_ahb" for phy config clock,
  13. "ref" for 19.2 MHz ref clk,
  14. "iface" for phy interface clock (Optional).
  15. - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
  16. - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
  17. - resets: Phandle to reset to phy block.
  18. Optional properties:
  19. - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim'
  20. tuning parameter value for qusb2 phy.
  21. - qcom,tcsr-syscon: Phandle to TCSR syscon register region.
  22. - qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
  23. added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
  24. tuning parameter that may vary for different boards of same SOC.
  25. This property is applicable to only QUSB2 v2 PHY (sdm845).
  26. - qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
  27. output current.
  28. Possible range is - 15mA to 24mA (stepsize of 600 uA).
  29. See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
  30. This property is applicable to only QUSB2 v2 PHY (sdm845).
  31. Default value is 22.2mA for sdm845.
  32. - qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
  33. Possible range is 0 to 15% (stepsize of 5%).
  34. See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
  35. This property is applicable to only QUSB2 v2 PHY (sdm845).
  36. Default value is 10% for sdm845.
  37. - qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
  38. pre-emphasis (specified using qcom,preemphasis-level) must be in
  39. effect. Duration could be half-bit of full-bit.
  40. See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
  41. This property is applicable to only QUSB2 v2 PHY (sdm845).
  42. Default value is full-bit width for sdm845.
  43. Example:
  44. hsusb_phy: phy@7411000 {
  45. compatible = "qcom,msm8996-qusb2-phy";
  46. reg = <0x7411000 0x180>;
  47. #phy-cells = <0>;
  48. clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
  49. <&gcc GCC_RX1_USB2_CLKREF_CLK>,
  50. clock-names = "cfg_ahb", "ref";
  51. vdda-pll-supply = <&pm8994_l12>;
  52. vdda-phy-dpdm-supply = <&pm8994_l24>;
  53. resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
  54. nvmem-cells = <&qusb2p_hstx_trim>;
  55. };