hisilicon,hi3660-reset.txt 1.2 KB

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  1. Hisilicon System Reset Controller
  2. ======================================
  3. Please also refer to reset.txt in this directory for common reset
  4. controller binding usage.
  5. The reset controller registers are part of the system-ctl block on
  6. hi3660 SoC.
  7. Required properties:
  8. - compatible: should be
  9. "hisilicon,hi3660-reset"
  10. - hisi,rst-syscon: phandle of the reset's syscon.
  11. - #reset-cells : Specifies the number of cells needed to encode a
  12. reset source. The type shall be a <u32> and the value shall be 2.
  13. Cell #1 : offset of the reset assert control
  14. register from the syscon register base
  15. offset + 4: deassert control register
  16. offset + 8: status control register
  17. Cell #2 : bit position of the reset in the reset control register
  18. Example:
  19. iomcu: iomcu@ffd7e000 {
  20. compatible = "hisilicon,hi3660-iomcu", "syscon";
  21. reg = <0x0 0xffd7e000 0x0 0x1000>;
  22. };
  23. iomcu_rst: iomcu_rst_controller {
  24. compatible = "hisilicon,hi3660-reset";
  25. hisi,rst-syscon = <&iomcu>;
  26. #reset-cells = <2>;
  27. };
  28. Specifying reset lines connected to IP modules
  29. ==============================================
  30. example:
  31. i2c0: i2c@..... {
  32. ...
  33. resets = <&iomcu_rst 0x20 3>; /* offset: 0x20; bit: 3 */
  34. ...
  35. };