snps,axs10x-reset.txt 922 B

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  1. Binding for the AXS10x reset controller
  2. This binding describes the ARC AXS10x boards custom IP-block which allows
  3. to control reset signals of selected peripherals. For example DW GMAC, etc...
  4. This block is controlled via memory-mapped register (AKA CREG) which
  5. represents up-to 32 reset lines.
  6. As of today only the following lines are used:
  7. - DW GMAC - line 5
  8. This binding uses the common reset binding[1].
  9. [1] Documentation/devicetree/bindings/reset/reset.txt
  10. Required properties:
  11. - compatible: should be "snps,axs10x-reset".
  12. - reg: should always contain pair address - length: for creg reset
  13. bits register.
  14. - #reset-cells: from common reset binding; Should always be set to 1.
  15. Example:
  16. reset: reset-controller@11220 {
  17. compatible = "snps,axs10x-reset";
  18. #reset-cells = <1>;
  19. reg = <0x11220 0x4>;
  20. };
  21. Specifying reset lines connected to IP modules:
  22. ethernet@.... {
  23. ....
  24. resets = <&reset 5>;
  25. ....
  26. };