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- Binding for the AXS10x reset controller
- This binding describes the ARC AXS10x boards custom IP-block which allows
- to control reset signals of selected peripherals. For example DW GMAC, etc...
- This block is controlled via memory-mapped register (AKA CREG) which
- represents up-to 32 reset lines.
- As of today only the following lines are used:
- - DW GMAC - line 5
- This binding uses the common reset binding[1].
- [1] Documentation/devicetree/bindings/reset/reset.txt
- Required properties:
- - compatible: should be "snps,axs10x-reset".
- - reg: should always contain pair address - length: for creg reset
- bits register.
- - #reset-cells: from common reset binding; Should always be set to 1.
- Example:
- reset: reset-controller@11220 {
- compatible = "snps,axs10x-reset";
- #reset-cells = <1>;
- reg = <0x11220 0x4>;
- };
- Specifying reset lines connected to IP modules:
- ethernet@.... {
- ....
- resets = <&reset 5>;
- ....
- };
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