rockchip-spdif.txt 1.4 KB

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  1. * Rockchip SPDIF transceiver
  2. The S/PDIF audio block is a stereo transceiver that allows the
  3. processor to receive and transmit digital audio via an coaxial cable or
  4. a fibre cable.
  5. Required properties:
  6. - compatible: should be one of the following:
  7. - "rockchip,rk3066-spdif"
  8. - "rockchip,rk3188-spdif"
  9. - "rockchip,rk3228-spdif"
  10. - "rockchip,rk3288-spdif"
  11. - "rockchip,rk3328-spdif"
  12. - "rockchip,rk3366-spdif"
  13. - "rockchip,rk3368-spdif"
  14. - "rockchip,rk3399-spdif"
  15. - reg: physical base address of the controller and length of memory mapped
  16. region.
  17. - interrupts: should contain the SPDIF interrupt.
  18. - dmas: DMA specifiers for tx dma. See the DMA client binding,
  19. Documentation/devicetree/bindings/dma/dma.txt
  20. - dma-names: should be "tx"
  21. - clocks: a list of phandle + clock-specifier pairs, one for each entry
  22. in clock-names.
  23. - clock-names: should contain following:
  24. - "hclk": clock for SPDIF controller
  25. - "mclk" : clock for SPDIF bus
  26. Required properties on RK3288:
  27. - rockchip,grf: the phandle of the syscon node for the general register
  28. file (GRF)
  29. Example for the rk3188 SPDIF controller:
  30. spdif: spdif@1011e000 {
  31. compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
  32. reg = <0x1011e000 0x2000>;
  33. interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  34. dmas = <&dmac1_s 8>;
  35. dma-names = "tx";
  36. clock-names = "hclk", "mclk";
  37. clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
  38. #sound-dai-cells = <0>;
  39. };