wm8903.txt 1.8 KB

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  1. WM8903 audio CODEC
  2. This device supports I2C only.
  3. Required properties:
  4. - compatible : "wlf,wm8903"
  5. - reg : the I2C address of the device.
  6. - gpio-controller : Indicates this device is a GPIO controller.
  7. - #gpio-cells : Should be two. The first cell is the pin number and the
  8. second cell is used to specify optional parameters (currently unused).
  9. Optional properties:
  10. - interrupts : The interrupt line the codec is connected to.
  11. - micdet-cfg : Default register value for R6 (Mic Bias). If absent, the
  12. default is 0.
  13. - micdet-delay : The debounce delay for microphone detection in mS. If
  14. absent, the default is 100.
  15. - gpio-cfg : A list of GPIO configuration register values. The list must
  16. be 5 entries long. If absent, no configuration of these registers is
  17. performed. If any entry has the value 0xffffffff, that GPIO's
  18. configuration will not be modified.
  19. - AVDD-supply : Analog power supply regulator on the AVDD pin.
  20. - CPVDD-supply : Charge pump supply regulator on the CPVDD pin.
  21. - DBVDD-supply : Digital buffer supply regulator for the DBVDD pin.
  22. - DCVDD-supply : Digital core supply regulator for the DCVDD pin.
  23. Pins on the device (for linking into audio routes):
  24. * IN1L
  25. * IN1R
  26. * IN2L
  27. * IN2R
  28. * IN3L
  29. * IN3R
  30. * DMICDAT
  31. * HPOUTL
  32. * HPOUTR
  33. * LINEOUTL
  34. * LINEOUTR
  35. * LOP
  36. * LON
  37. * ROP
  38. * RON
  39. * MICBIAS
  40. Example:
  41. wm8903: codec@1a {
  42. compatible = "wlf,wm8903";
  43. reg = <0x1a>;
  44. interrupts = < 347 >;
  45. AVDD-supply = <&fooreg_a>;
  46. CPVDD-supply = <&fooreg_b>;
  47. DBVDD-supply = <&fooreg_c>;
  48. DCVDC-supply = <&fooreg_d>;
  49. gpio-controller;
  50. #gpio-cells = <2>;
  51. micdet-cfg = <0>;
  52. micdet-delay = <100>;
  53. gpio-cfg = <
  54. 0x0600 /* DMIC_LR, output */
  55. 0x0680 /* DMIC_DAT, input */
  56. 0x0000 /* GPIO, output, low */
  57. 0x0200 /* Interrupt, output */
  58. 0x01a0 /* BCLK, input, active high */
  59. >;
  60. };