rockchip-thermal.txt 2.8 KB

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  1. * Temperature Sensor ADC (TSADC) on rockchip SoCs
  2. Required properties:
  3. - compatible : should be "rockchip,<name>-tsadc"
  4. "rockchip,rv1108-tsadc": found on RV1108 SoCs
  5. "rockchip,rk3228-tsadc": found on RK3228 SoCs
  6. "rockchip,rk3288-tsadc": found on RK3288 SoCs
  7. "rockchip,rk3328-tsadc": found on RK3328 SoCs
  8. "rockchip,rk3368-tsadc": found on RK3368 SoCs
  9. "rockchip,rk3399-tsadc": found on RK3399 SoCs
  10. - reg : physical base address of the controller and length of memory mapped
  11. region.
  12. - interrupts : The interrupt number to the cpu. The interrupt specifier format
  13. depends on the interrupt controller.
  14. - clocks : Must contain an entry for each entry in clock-names.
  15. - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
  16. the peripheral clock.
  17. - resets : Must contain an entry for each entry in reset-names.
  18. See ../reset/reset.txt for details.
  19. - reset-names : Must include the name "tsadc-apb".
  20. - pinctrl-names : The pin control state names;
  21. - pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
  22. - pinctrl-1 : The "default" pinctrl state, it will be set after reset the
  23. TSADC controller.
  24. - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
  25. - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
  26. Optional properties:
  27. - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
  28. - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
  29. - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
  30. 1:HIGH.
  31. - rockchip,grf : The phandle of the syscon node for the general register file.
  32. Exiample:
  33. tsadc: tsadc@ff280000 {
  34. compatible = "rockchip,rk3288-tsadc";
  35. reg = <0xff280000 0x100>;
  36. interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  37. clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
  38. clock-names = "tsadc", "apb_pclk";
  39. resets = <&cru SRST_TSADC>;
  40. reset-names = "tsadc-apb";
  41. pinctrl-names = "init", "default", "sleep";
  42. pinctrl-0 = <&otp_gpio>;
  43. pinctrl-1 = <&otp_out>;
  44. pinctrl-2 = <&otp_gpio>;
  45. #thermal-sensor-cells = <1>;
  46. rockchip,hw-tshut-temp = <95000>;
  47. rockchip,hw-tshut-mode = <0>;
  48. rockchip,hw-tshut-polarity = <0>;
  49. };
  50. Example: referring to thermal sensors:
  51. thermal-zones {
  52. cpu_thermal: cpu_thermal {
  53. polling-delay-passive = <1000>; /* milliseconds */
  54. polling-delay = <5000>; /* milliseconds */
  55. /* sensor ID */
  56. thermal-sensors = <&tsadc 1>;
  57. trips {
  58. cpu_alert0: cpu_alert {
  59. temperature = <70000>; /* millicelsius */
  60. hysteresis = <2000>; /* millicelsius */
  61. type = "passive";
  62. };
  63. cpu_crit: cpu_crit {
  64. temperature = <90000>; /* millicelsius */
  65. hysteresis = <2000>; /* millicelsius */
  66. type = "critical";
  67. };
  68. };
  69. cooling-maps {
  70. map0 {
  71. trip = <&cpu_alert0>;
  72. cooling-device =
  73. <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  74. };
  75. };
  76. };
  77. };