ci-hdrc-usb2.txt 5.0 KB

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  1. * USB2 ChipIdea USB controller for ci13xxx
  2. Required properties:
  3. - compatible: should be one of:
  4. "fsl,imx23-usb"
  5. "fsl,imx27-usb"
  6. "fsl,imx28-usb"
  7. "fsl,imx6q-usb"
  8. "fsl,imx6sl-usb"
  9. "fsl,imx6sx-usb"
  10. "fsl,imx6ul-usb"
  11. "fsl,imx7d-usb"
  12. "lsi,zevio-usb"
  13. "qcom,ci-hdrc"
  14. "chipidea,usb2"
  15. "xlnx,zynq-usb-2.20a"
  16. - reg: base address and length of the registers
  17. - interrupts: interrupt for the USB controller
  18. Recommended properies:
  19. - phy_type: the type of the phy connected to the core. Should be one
  20. of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
  21. property the PORTSC register won't be touched.
  22. - dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
  23. Deprecated properties:
  24. - usb-phy: phandle for the PHY device. Use "phys" instead.
  25. - fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
  26. Optional properties:
  27. - clocks: reference to the USB clock
  28. - phys: reference to the USB PHY
  29. - phy-names: should be "usb-phy"
  30. - vbus-supply: reference to the VBUS regulator
  31. - maximum-speed: limit the maximum connection speed to "full-speed".
  32. - tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
  33. - itc-setting: interrupt threshold control register control, the setting
  34. should be aligned with ITC bits at register USBCMD.
  35. - ahb-burst-config: it is vendor dependent, the required value should be
  36. aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
  37. property is used to change AHB burst configuration, check the chipidea
  38. spec for meaning of each value. If this property is not existed, it
  39. will use the reset value.
  40. - tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
  41. (4 bytes), This register represents the maximum length of a the burst
  42. in 32-bit words while moving data from system memory to the USB
  43. bus, the value of this property will only take effect if property
  44. "ahb-burst-config" is set to 0, if this property is missing the reset
  45. default of the hardware implementation will be used.
  46. - rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
  47. (4 bytes), This register represents the maximum length of a the burst
  48. in 32-bit words while moving data from the USB bus to system memory,
  49. the value of this property will only take effect if property
  50. "ahb-burst-config" is set to 0, if this property is missing the reset
  51. default of the hardware implementation will be used.
  52. - extcon: phandles to external connector devices. First phandle should point to
  53. external connector, which provide "USB" cable events, the second should point
  54. to external connector device, which provide "USB-HOST" cable events. If one
  55. of the external connector devices is not required, empty <0> phandle should
  56. be specified.
  57. - phy-clkgate-delay-us: the delay time (us) between putting the PHY into
  58. low power mode and gating the PHY clock.
  59. - non-zero-ttctrl-ttha: after setting this property, the value of register
  60. ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
  61. value. It needs to be very carefully for setting this property, it is
  62. recommended that consult with your IC engineer before setting this value.
  63. On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
  64. property only affects siTD.
  65. If this property is not set, the max packet size is 1023 bytes, and if
  66. the total of packet size for pervious transactions are more than 256 bytes,
  67. it can't accept any transactions within this frame. The use case is single
  68. transaction, but higher frame rate.
  69. If this property is set, the max packet size is 188 bytes, it can handle
  70. more transactions than above case, it can accept transactions until it
  71. considers the left room size within frame is less than 188 bytes, software
  72. needs to make sure it does not send more than 90%
  73. maximum_periodic_data_per_frame. The use case is multiple transactions, but
  74. less frame rate.
  75. - mux-controls: The mux control for toggling host/device output of this
  76. controller. It's expected that a mux state of 0 indicates device mode and a
  77. mux state of 1 indicates host mode.
  78. - mux-control-names: Shall be "usb_switch" if mux-controls is specified.
  79. i.mx specific properties
  80. - fsl,usbmisc: phandler of non-core register device, with one
  81. argument that indicate usb controller index
  82. - disable-over-current: disable over current detect
  83. - over-current-active-high: over current signal polarity is high active,
  84. typically over current signal polarity is low active.
  85. - external-vbus-divider: enables off-chip resistor divider for Vbus
  86. Example:
  87. usb@f7ed0000 {
  88. compatible = "chipidea,usb2";
  89. reg = <0xf7ed0000 0x10000>;
  90. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  91. clocks = <&chip CLKID_USB0>;
  92. phys = <&usb_phy0>;
  93. phy-names = "usb-phy";
  94. vbus-supply = <&reg_usb0_vbus>;
  95. itc-setting = <0x4>; /* 4 micro-frames */
  96. /* Incremental burst of unspecified length */
  97. ahb-burst-config = <0x0>;
  98. tx-burst-size-dword = <0x10>; /* 64 bytes */
  99. rx-burst-size-dword = <0x10>;
  100. extcon = <0>, <&usb_id>;
  101. phy-clkgate-delay-us = <400>;
  102. mux-controls = <&usb_switch>;
  103. mux-control-names = "usb_switch";
  104. };